| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2022-07-18 | target/arm: Don't set syndrome ISS for loads and stores with writeback | Peter Maydell | 1 | -1/+3 |
| 2022-07-18 | target/arm: Honour VTCR_EL2 bits in Secure EL2 | Peter Maydell | 2 | -3/+38 |
| 2022-07-18 | target/arm: Store TCR_EL* registers as uint64_t | Peter Maydell | 6 | -68/+27 |
| 2022-07-18 | target/arm: Store VTCR_EL2, VSTCR_EL2 registers as uint64_t | Peter Maydell | 4 | -14/+12 |
| 2022-07-18 | target/arm: Fix big-endian host handling of VTCR | Peter Maydell | 1 | -1/+1 |
| 2022-07-18 | target/arm: Fold regime_tcr() and regime_tcr_value() together | Peter Maydell | 4 | -18/+12 |
| 2022-07-18 | target/arm: Calculate mask/base_mask in get_level1_table_address() | Peter Maydell | 1 | -5/+9 |
| 2022-07-18 | target/arm: Define and use new regime_tcr_value() function | Peter Maydell | 4 | -8/+14 |
| 2022-07-18 | linux-user/aarch64: Do not clear PROT_MTE on mprotect | Richard Henderson | 1 | -2/+5 |
| 2022-07-18 | target/arm: Fix aarch64_sve_change_el for SME | Richard Henderson | 1 | -6/+25 |
| 2022-07-18 | target/arm: Fill in VL for tbflags when SME enabled and SVE disabled | Richard Henderson | 1 | -2/+8 |
| 2022-07-14 | Merge tag 'darwin-20220712' of https://github.com/philmd/qemu into staging | Peter Maydell | 3 | -13/+23 |
| 2022-07-13 | hvf: Enable RDTSCP support | Cameron Esfahani | 3 | -13/+23 |
| 2022-07-12 | target/mips: Remove GET_TARGET_STRING and FREE_TARGET_STRING | Richard Henderson | 1 | -18/+9 |
| 2022-07-12 | target/mips: Simplify UHI_argnlen and UHI_argn | Richard Henderson | 1 | -23/+21 |
| 2022-07-12 | target/mips: Use error_report for UHI_assert | Richard Henderson | 1 | -21/+18 |
| 2022-07-12 | target/mips: Avoid qemu_semihosting_log_out for UHI_plog | Richard Henderson | 1 | -11/+41 |
| 2022-07-12 | target/mips: Use semihosting/syscalls.h | Richard Henderson | 1 | -120/+91 |
| 2022-07-12 | target/mips: Drop link syscall from semihosting | Richard Henderson | 1 | -9/+0 |
| 2022-07-12 | target/mips: Create report_fault for semihosting | Richard Henderson | 1 | -18/+15 |
| 2022-07-12 | target/mips: introduce Cavium Octeon CPU model | Pavel Dovgalyuk | 1 | -0/+28 |
| 2022-07-12 | target/mips: implement Octeon-specific arithmetic instructions | Pavel Dovgalyuk | 2 | -0/+181 |
| 2022-07-12 | target/mips: implement Octeon-specific BBIT instructions | Pavel Dovgalyuk | 2 | -0/+39 |
| 2022-07-12 | target/mips: introduce decodetree structure for Cavium Octeon extension | Pavel Dovgalyuk | 6 | -0/+31 |
| 2022-07-11 | target/arm: Enable SME for user-only | Richard Henderson | 1 | -0/+11 |
| 2022-07-11 | target/arm: Only set ZEN in reset if SVE present | Richard Henderson | 1 | -4/+3 |
| 2022-07-11 | target/arm: Enable SME for -cpu max | Richard Henderson | 1 | -0/+11 |
| 2022-07-11 | target/arm: Reset streaming sve state on exception boundaries | Richard Henderson | 1 | -2/+13 |
| 2022-07-11 | target/arm: Implement SCLAMP, UCLAMP | Richard Henderson | 4 | -0/+149 |
| 2022-07-11 | target/arm: Implement REVD | Richard Henderson | 4 | -0/+21 |
| 2022-07-11 | target/arm: Implement PSEL | Richard Henderson | 2 | -0/+77 |
| 2022-07-11 | target/arm: Implement SME integer outer product | Richard Henderson | 4 | -0/+118 |
| 2022-07-11 | target/arm: Implement FMOPA, FMOPS (widening) | Richard Henderson | 4 | -0/+78 |
| 2022-07-11 | target/arm: Implement BFMOPA, BFMOPS | Richard Henderson | 4 | -0/+90 |
| 2022-07-11 | target/arm: Implement FMOPA, FMOPS (non-widening) | Richard Henderson | 4 | -0/+115 |
| 2022-07-11 | target/arm: Implement SME ADDHA, ADDVA | Richard Henderson | 4 | -0/+137 |
| 2022-07-11 | target/arm: Implement SME LDR, STR | Richard Henderson | 2 | -0/+31 |
| 2022-07-11 | target/arm: Export unpredicated ld/st from translate-sve.c | Richard Henderson | 2 | -12/+39 |
| 2022-07-11 | target/arm: Implement SME LD1, ST1 | Richard Henderson | 4 | -0/+756 |
| 2022-07-11 | target/arm: Implement SME MOVA | Richard Henderson | 8 | -1/+331 |
| 2022-07-11 | target/arm: Implement SME ZERO | Richard Henderson | 4 | -0/+44 |
| 2022-07-11 | target/arm: Implement SME RDSVL, ADDSVL, ADDSPL | Richard Henderson | 3 | -1/+54 |
| 2022-07-11 | target/arm: Handle SME in sve_access_check | Richard Henderson | 1 | -6/+16 |
| 2022-07-11 | target/arm: Add SME enablement checks | Richard Henderson | 2 | -0/+55 |
| 2022-07-11 | target/arm: Mark LD1RO as non-streaming | Richard Henderson | 2 | -3/+2 |
| 2022-07-11 | target/arm: Mark LDFF1 and LDNF1 as non-streaming | Richard Henderson | 2 | -2/+2 |
| 2022-07-11 | target/arm: Mark gather prefetch as non-streaming | Richard Henderson | 3 | -8/+16 |
| 2022-07-11 | target/arm: Mark gather/scatter load/store as non-streaming | Richard Henderson | 2 | -9/+6 |
| 2022-07-11 | target/arm: Mark string/histo/crypto as non-streaming | Richard Henderson | 2 | -18/+18 |
| 2022-07-11 | target/arm: Mark SMMLA, UMMLA, USMMLA as non-streaming | Richard Henderson | 2 | -7/+6 |
