riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2020-07-24	target/i386: Save cc_op before loop insns	Richard Henderson	1	-0/+1
2020-07-24	target/hppa: Free some temps in do_sub	Richard Henderson	1	-0/+2
2020-07-24	Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-for-5.1-pull-req...	Peter Maydell	1	-5/+11
2020-07-23	KVM: fix CPU reset wrt HF2_GIF_MASK	Vitaly Kuznetsov	1	-5/+11
2020-07-22	target/riscv: Fix the range of pmpcfg of CSR funcion table	Zong Li	1	-1/+1
2020-07-22	target/riscv: fix vector index load/store constraints	LIU Zhiwei	1	-1/+9
2020-07-22	target/riscv: Quiet Coverity complains about vamo*	LIU Zhiwei	1	-0/+1
2020-07-20	hw/arm/virt: Enable MTE via a machine property	Richard Henderson	2	-10/+14
2020-07-16	i386: hvf: Explicitly set CR4 guest/host mask	Roman Bolshakov	1	-0/+1
2020-07-16	target/i386: add the missing vmx features for Skylake-Server and Cascadelake-...	Chenyi Qiang	1	-0/+14
2020-07-16	target/i386: fix model number and add missing features for Icelake-Server CPU...	Chenyi Qiang	1	-0/+14
2020-07-16	target/i386: add fast short REP MOV support	Chenyi Qiang	2	-1/+3
2020-07-16	i386/cpu: Don't add unavailable_features to env->user_features	Xiaoyao Li	1	-1/+0
2020-07-16	i368/cpu: Clear env->user_features after loading versioned CPU model	Xiaoyao Li	1	-0/+7
2020-07-15	Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-next-20200714' ...	Peter Maydell	2	-9/+2
2020-07-14	target/mips: Fix ADD.S FPU instruction	Alex Richardson	1	-1/+1
2020-07-14	target/mips: Remove identical if/else branches	Aleksandar Markovic	1	-8/+1
2020-07-14	Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200...	Peter Maydell	3	-4/+9
2020-07-14	Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2020-07-13' into st...	Peter Maydell	1	-3/+3
2020-07-13	target/riscv: Fix pmp NA4 implementation	Alexandre Mergnat	1	-1/+1
2020-07-13	target/riscv: fix vill bit index in vtype register	Frank Chang	1	-1/+1
2020-07-13	target/riscv: fix return value of do_opivx_widen()	Frank Chang	1	-1/+1
2020-07-13	target/riscv: correct the gvec IR called in gen_vec_rsub16_i64()	Frank Chang	1	-1/+1
2020-07-13	target/riscv: fix rsub gvec tcg_assert_listed_vecop assertion	Frank Chang	1	-0/+5
2020-07-13	hax: Fix setting of FD_CLOEXEC	Eric Blake	1	-3/+3
2020-07-13	target/nios2: Use gen_io_start around wrctl instruction	Wentong Wu	1	-0/+5
2020-07-13	target/nios2: in line the semantics of DISAS_UPDATE with other targets	Wentong Wu	1	-1/+1
2020-07-13	target/nios2: add DISAS_NORETURN case for nothing more to generate	Wentong Wu	1	-2/+3
2020-07-13	target/arm: Don't do raw writes for PMINTENCLR	Aaron Lindsay	1	-2/+2
2020-07-13	target/arm: Fix mtedesc for do_mem_zpz	Richard Henderson	1	-1/+1
2020-07-11	Merge remote-tracking branch 'remotes/philmd-gitlab/tags/avr-port-20200711' i...	Peter Maydell	12	-0/+4818
2020-07-11	target/avr/disas: Fix store instructions display order	Philippe Mathieu-Daudé	1	-10/+10
2020-07-11	target/avr/cpu: Fix $PC displayed address	Philippe Mathieu-Daudé	1	-1/+1
2020-07-11	target/avr/cpu: Drop tlb_flush() in avr_cpu_reset()	Philippe Mathieu-Daudé	1	-2/+0
2020-07-11	target/avr: Register AVR support with the rest of QEMU	Michael Rolnik	1	-0/+34
2020-07-11	target/avr: Add support for disassembling via option '-d in_asm'	Michael Rolnik	4	-1/+259
2020-07-11	target/avr: Initialize TCG register variables	Michael Rolnik	1	-0/+29
2020-07-11	target/avr: Add instruction translation - CPU main translation function	Michael Rolnik	1	-0/+213
2020-07-11	target/avr: Add instruction translation - MCU Control Instructions	Michael Rolnik	2	-0/+73
2020-07-11	target/avr: Add instruction translation - Bit and Bit-test Instructions	Michael Rolnik	2	-0/+261
2020-07-11	target/avr: Add instruction translation - Data Transfer Instructions	Michael Rolnik	2	-0/+1046
2020-07-11	target/avr: Add instruction translation - Branch Instructions	Michael Rolnik	2	-0/+576
2020-07-11	target/avr: Add instruction translation - Arithmetic and Logic Instructions	Michael Rolnik	2	-0/+896
2020-07-11	target/avr: Add instruction translation - Register definitions	Michael Rolnik	1	-0/+142
2020-07-11	target/avr: Add instruction helpers	Michael Rolnik	2	-0/+238
2020-07-10	apic: Report current_count via 'info lapic'	Jan Kiszka	1	-2/+3
2020-07-10	target/i386: Enable TSX Suspend Load Address Tracking feature	Cathy Zhang	2	-1/+3
2020-07-10	target/i386: Add SERIALIZE cpu feature	Cathy Zhang	2	-1/+3
2020-07-10	target/i386: Correct the warning message of Intel PT	Luwei Kang	1	-1/+1
2020-07-10	target/i386: sev: fail query-sev-capabilities if QEMU cannot use SEV	Paolo Bonzini	1	-0/+9