| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-09-19 | target/arm: Correct ID_AA64ISAR1_EL1 value for neoverse-v1 | Peter Maydell | 1 | -1/+1 |
| 2024-09-19 | target/arm: Convert scalar [US]QSHRN, [US]QRSHRN, SQSHRUN to decodetree | Richard Henderson | 2 | -127/+63 |
| 2024-09-19 | target/arm: Convert vector [US]QSHRN, [US]QRSHRN, SQSHRUN to decodetree | Richard Henderson | 2 | -14/+186 |
| 2024-09-19 | target/arm: Convert SQSHL, UQSHL, SQSHLU (immediate) to decodetree | Richard Henderson | 2 | -131/+128 |
| 2024-09-19 | target/arm: Widen NeonGenNarrowEnvFn return to 64 bits | Richard Henderson | 5 | -78/+93 |
| 2024-09-19 | target/arm: Convert VQSHL, VQSHLU to gvec | Richard Henderson | 6 | -110/+94 |
| 2024-09-19 | target/arm: Convert handle_scalar_simd_shli to decodetree | Richard Henderson | 2 | -35/+13 |
| 2024-09-19 | target/arm: Convert handle_scalar_simd_shri to decodetree | Richard Henderson | 2 | -70/+86 |
| 2024-09-19 | target/arm: Convert SHRN, RSHRN to decodetree | Richard Henderson | 2 | -48/+55 |
| 2024-09-19 | target/arm: Split out subroutines of handle_shri_with_rndacc | Richard Henderson | 1 | -56/+82 |
| 2024-09-19 | target/arm: Push tcg_rnd into handle_shri_with_rndacc | Richard Henderson | 1 | -26/+6 |
| 2024-09-19 | target/arm: Convert SSHLL, USHLL to decodetree | Richard Henderson | 2 | -44/+45 |
| 2024-09-19 | target/arm: Use {, s}extract in handle_vec_simd_wshli | Richard Henderson | 1 | -2/+5 |
| 2024-09-19 | target/arm: Convert handle_vec_simd_shli to decodetree | Richard Henderson | 2 | -30/+18 |
| 2024-09-19 | target/arm: Convert handle_vec_simd_shri to decodetree | Richard Henderson | 2 | -60/+89 |
| 2024-09-19 | target/arm: Fix whitespace near gen_srshr64_i64 | Richard Henderson | 1 | -1/+1 |
| 2024-09-19 | target/arm: Introduce gen_gvec_sshr, gen_gvec_ushr | Richard Henderson | 4 | -38/+27 |
| 2024-09-19 | target/arm: Convert MOVI, FMOV, ORR, BIC (vector immediate) to decodetree | Richard Henderson | 2 | -67/+59 |
| 2024-09-19 | target/arm: Convert FMOVI (scalar, immediate) to decodetree | Richard Henderson | 2 | -48/+30 |
| 2024-09-19 | target/arm: Convert FMAXNMV, FMINNMV, FMAXV, FMINV to decodetree | Richard Henderson | 2 | -123/+67 |
| 2024-09-19 | target/arm: Convert ADDV, *ADDLV, *MAXV, *MINV to decodetree | Richard Henderson | 2 | -91/+61 |
| 2024-09-19 | target/arm: Simplify do_reduction_op | Richard Henderson | 1 | -27/+13 |
| 2024-09-19 | target/arm: Convert UZP, TRN, ZIP to decodetree | Richard Henderson | 2 | -90/+77 |
| 2024-09-19 | target/arm: Convert TBL, TBX to decodetree | Richard Henderson | 2 | -33/+18 |
| 2024-09-19 | target/arm: Convert EXT to decodetree | Richard Henderson | 2 | -73/+53 |
| 2024-09-19 | target/arm: Use tcg_gen_extract2_i64 for EXT | Richard Henderson | 1 | -20/+3 |
| 2024-09-19 | target/arm: Use cmpsel in gen_sshl_vec | Richard Henderson | 1 | -5/+3 |
| 2024-09-19 | target/arm: Use cmpsel in gen_ushl_vec | Richard Henderson | 1 | -11/+8 |
| 2024-09-19 | target/arm: Replace tcg_gen_dupi_vec with constants in translate-sve.c | Richard Henderson | 1 | -79/+49 |
| 2024-09-19 | target/arm: Replace tcg_gen_dupi_vec with constants in gengvec.c | Richard Henderson | 1 | -24/+19 |
| 2024-09-13 | target/riscv: Remove the deprecated 'any' CPU type | Philippe Mathieu-Daudé | 2 | -29/+0 |
| 2024-09-13 | target/cris: Remove the deprecated CRIS target | Philippe Mathieu-Daudé | 20 | -7280/+0 |
| 2024-09-13 | target/arm/tcg: refine cache descriptions with a wrapper | Alireza Sanaee | 3 | -60/+117 |
| 2024-09-13 | hvf: arm: Implement and use hvf_get_physical_address_range | Danny Canter | 4 | -1/+108 |
| 2024-09-13 | hvf: Split up hv_vm_create logic per arch | Danny Canter | 2 | -0/+14 |
| 2024-09-13 | kvm: Use 'unsigned long' for request argument in functions wrapping ioctl() | Johannes Stoelp | 1 | -1/+2 |
| 2024-09-13 | target/alpha, hppa: Remove unused parent_reset fields | Peter Maydell | 2 | -4/+0 |
| 2024-09-13 | target/s390: Convert CPU to Resettable interface | Peter Maydell | 3 | -44/+23 |
| 2024-09-13 | Merge tag 'pull-loongarch-20240912' of https://gitlab.com/gaosong/qemu into s... | Peter Maydell | 6 | -3/+191 |
| 2024-09-12 | target/loongarch: Support QMP dump-guest-memory | Bibo Mao | 4 | -0/+171 |
| 2024-09-12 | target/loongarch/kvm: Add vCPU reset function | Bibo Mao | 3 | -3/+6 |
| 2024-09-12 | target/loongarch: Add compatible support about VM reboot | Bibo Mao | 1 | -0/+14 |
| 2024-09-11 | target/sparc: Add gen_trap_if_nofpu_fpexception | Richard Henderson | 1 | -29/+61 |
| 2024-09-11 | target/sparc: Implement STDFQ | Richard Henderson | 2 | -3/+27 |
| 2024-09-11 | target/sparc: Add FSR_QNE to tb_flags | Richard Henderson | 2 | -4/+14 |
| 2024-09-11 | target/sparc: Populate sparc32 FQ when raising fp exception | Carl Hauser | 1 | -15/+25 |
| 2024-09-11 | target/sparc: Add FQ and FSR.QNE | Carl Hauser | 3 | -0/+51 |
| 2024-09-11 | Merge tag 'pull-testing-gdbstub-oct-100924-1' of https://gitlab.com/stsquad/q... | Peter Maydell | 1 | -6/+17 |
| 2024-09-10 | gdbstub: Add support for MTE in system mode | Gustavo Romero | 1 | -2/+4 |
| 2024-09-10 | gdbstub: Use specific MMU index when probing MTE addresses | Gustavo Romero | 1 | -4/+13 |
