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author | Peter Maydell <peter.maydell@linaro.org> | 2024-09-11 13:17:29 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2024-09-11 13:17:29 +0100 |
commit | a4eb31c678400472de0b4915b9154a7c20d8332f (patch) | |
tree | c95ad49cc298bc7ebbfb9ec1cc596e0cf8877041 /target | |
parent | b8eada54b2ad8a7d98d93d5ab4d3e888c5880097 (diff) | |
parent | 06dd94e84336d2c5a86c99049dc9abb4a1d6b2e5 (diff) | |
download | qemu-a4eb31c678400472de0b4915b9154a7c20d8332f.zip qemu-a4eb31c678400472de0b4915b9154a7c20d8332f.tar.gz qemu-a4eb31c678400472de0b4915b9154a7c20d8332f.tar.bz2 |
Merge tag 'pull-testing-gdbstub-oct-100924-1' of https://gitlab.com/stsquad/qemu into staging
testing and gdbstub updates:
- remove docker-armel-cross
- update i686 and mipsel images to bookworm
- use docker-all-test-cross for mips64le tests
- fix duplicated line in docs
- update gitlab-runner ansible script
- support MTE in gdbstub for system mode
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# gpg: Signature made Tue 10 Sep 2024 23:36:31 BST
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# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
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* tag 'pull-testing-gdbstub-oct-100924-1' of https://gitlab.com/stsquad/qemu:
tests/tcg/aarch64: Extend MTE gdbstub tests to system mode
tests/tcg/aarch64: Improve linker script organization
tests/guest-debug: Support passing arguments to the GDB test script
gdbstub: Add support for MTE in system mode
gdbstub: Use specific MMU index when probing MTE addresses
scripts/ci: update the gitlab-runner playbook
docs/devel: fix duplicate line
tests/docker: use debian-all-test-cross for mips64el tests
tests/docker: update debian i686 and mipsel images to bookworm
tests/docker: remove debian-armel-cross
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/arm/gdbstub64.c | 23 |
1 files changed, 17 insertions, 6 deletions
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c index 5221381..1a4dbec 100644 --- a/target/arm/gdbstub64.c +++ b/target/arm/gdbstub64.c @@ -430,11 +430,14 @@ int aarch64_gdb_set_tag_ctl_reg(CPUState *cs, uint8_t *buf, int reg) return 0; #endif } +#endif /* CONFIG_USER_ONLY */ +#ifdef CONFIG_TCG static void handle_q_memtag(GArray *params, void *user_ctx) { ARMCPU *cpu = ARM_CPU(user_ctx); CPUARMState *env = &cpu->env; + uint32_t mmu_index; uint64_t addr = gdb_get_cmd_param(params, 0)->val_ull; uint64_t len = gdb_get_cmd_param(params, 1)->val_ul; @@ -458,8 +461,10 @@ static void handle_q_memtag(GArray *params, void *user_ctx) gdb_put_packet("E03"); } + /* Find out the current translation regime for probe. */ + mmu_index = cpu_mmu_index(env_cpu(env), false); /* Note that tags are packed here (2 tags packed in one byte). */ - tags = allocation_tag_mem_probe(env, 0, addr, MMU_DATA_LOAD, 8 /* 64-bit */, + tags = allocation_tag_mem_probe(env, mmu_index, addr, MMU_DATA_LOAD, 1, MMU_DATA_LOAD, true, 0); if (!tags) { /* Address is not in a tagged region. */ @@ -478,13 +483,16 @@ static void handle_q_isaddresstagged(GArray *params, void *user_ctx) { ARMCPU *cpu = ARM_CPU(user_ctx); CPUARMState *env = &cpu->env; + uint32_t mmu_index; uint64_t addr = gdb_get_cmd_param(params, 0)->val_ull; uint8_t *tags; const char *reply; - tags = allocation_tag_mem_probe(env, 0, addr, MMU_DATA_LOAD, 8 /* 64-bit */, + /* Find out the current translation regime for probe. */ + mmu_index = cpu_mmu_index(env_cpu(env), false); + tags = allocation_tag_mem_probe(env, mmu_index, addr, MMU_DATA_LOAD, 1, MMU_DATA_LOAD, true, 0); reply = tags ? "01" : "00"; @@ -495,6 +503,7 @@ static void handle_Q_memtag(GArray *params, void *user_ctx) { ARMCPU *cpu = ARM_CPU(user_ctx); CPUARMState *env = &cpu->env; + uint32_t mmu_index; uint64_t start_addr = gdb_get_cmd_param(params, 0)->val_ull; uint64_t len = gdb_get_cmd_param(params, 1)->val_ul; @@ -527,8 +536,10 @@ static void handle_Q_memtag(GArray *params, void *user_ctx) * Get all tags in the page starting from the tag of the start address. * Note that there are two tags packed into a single byte here. */ - tags = allocation_tag_mem_probe(env, 0, start_addr, MMU_DATA_STORE, - 8 /* 64-bit */, MMU_DATA_STORE, true, 0); + /* Find out the current translation regime for probe. */ + mmu_index = cpu_mmu_index(env_cpu(env), false); + tags = allocation_tag_mem_probe(env, mmu_index, start_addr, MMU_DATA_STORE, + 1, MMU_DATA_STORE, true, 0); if (!tags) { /* Address is not in a tagged region. */ gdb_put_packet("E04"); @@ -591,13 +602,13 @@ static const GdbCmdParseEntry cmd_handler_table[NUM_CMDS] = { .need_cpu_context = true }, }; -#endif /* CONFIG_USER_ONLY */ +#endif /* CONFIG_TCG */ void aarch64_cpu_register_gdb_commands(ARMCPU *cpu, GString *qsupported, GPtrArray *qtable, GPtrArray *stable) { -#ifdef CONFIG_USER_ONLY /* MTE */ +#ifdef CONFIG_TCG if (cpu_isar_feature(aa64_mte, cpu)) { g_string_append(qsupported, ";memory-tagging+"); |