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2022-07-04target/loongarch: Add lock when writing timer clear regXiaojuan Yang1-0/+2
2022-07-04target/loongarch: Fix the meaning of ECFG reg's VS fieldXiaojuan Yang1-0/+4
2022-07-04target/loongarch: Update READMESong Gao1-2/+37
2022-07-04target/loongarch: Adjust functions and structure to support user-modeSong Gao6-1/+72
2022-07-04target/loongarch: remove unused include hw/loader.hSong Gao1-1/+0
2022-07-04target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong exceptionSong Gao2-2/+4
2022-07-04target/loongarch: Fix missing update CSR_BADVSong Gao1-4/+6
2022-07-04target/loongarch: remove badaddr from CPULoongArchSong Gao2-3/+1
2022-07-03target/riscv: Update default priority table for local interruptsAnup Patel2-70/+66
2022-07-03target/riscv: Remove CSRs that set/clear an IMSIC interrupt file bitsAnup Patel2-168/+6
2022-07-03target/riscv: Set minumum priv spec version for mcountinhibitAnup Patel1-1/+1
2022-07-03target/riscv: Don't force update priv spec version to latestAnup Patel1-4/+8
2022-07-03target/riscv: Ibex: Support priv version 1.11Alistair Francis1-1/+1
2022-07-03target/riscv: Fixup MSECCFG minimum priv checkAlistair Francis1-1/+1
2022-07-03target/riscv: Support mcycle/minstret write operationAtish Patra6-53/+213
2022-07-03target/riscv: Add support for hpmcounters/hpmeventsAtish Patra3-152/+331
2022-07-03target/riscv: Implement mcountinhibit CSRAtish Patra4-0/+32
2022-07-03target/riscv: pmu: Make number of counters configurableAtish Patra3-36/+63
2022-07-03target/riscv: pmu: Rename the counters extension to pmuAtish Patra3-5/+5
2022-07-03target/riscv: Implement PMU CSR predicate function for S-modeAtish Patra1-0/+51
2022-07-03target/riscv: Fix PMU CSR predicate functionAtish Patra1-4/+7
2022-07-03target/riscv/pmp: guard against PMP ranges with a negative sizeNicolas Pitre1-0/+3
2022-07-03target/riscv: Minimize the calls to decode_save_opcRichard Henderson4-9/+17
2022-07-03target/riscv: Remove generate_exception_mtvalRichard Henderson1-9/+2
2022-07-03target/riscv: Set env->bins in gen_exception_illegalRichard Henderson1-0/+2
2022-07-03target/riscv: Remove condition guarding register zero for auipc and luiVĂ­ctor Colombo1-6/+2
2022-06-28target/nios2: Move nios2-semi.c to nios2_softmmu_ssRichard Henderson2-7/+2
2022-06-28target/nios2: Eliminate nios2_semi_is_lseekRichard Henderson1-36/+23
2022-06-28target/mips: Drop pread and pwrite syscalls from semihostingRichard Henderson1-32/+7
2022-06-28target/mips: Add UHI errno valuesRichard Henderson1-0/+40
2022-06-28target/mips: Use an exception for semihostingRichard Henderson10-21/+19
2022-06-28target/m68k: Make semihosting system onlyRichard Henderson2-38/+4
2022-06-28target/m68k: Eliminate m68k_semi_is_fseekRichard Henderson1-32/+23
2022-06-28gdbstub: Adjust gdb_syscall_complete_cb declarationRichard Henderson2-12/+6
2022-06-28semihosting: Split out common-semi-target.hRichard Henderson2-0/+112
2022-06-28include/exec: Move gdb_stat and gdb_timeval to gdbstub.hRichard Henderson2-54/+8
2022-06-28include/exec: Move gdb open flags to gdbstub.hRichard Henderson2-16/+0
2022-06-28semihosting: Return void from do_common_semihostingRichard Henderson3-4/+4
2022-06-28semihosting: Move exec/softmmu-semi.h to semihosting/softmmu-uaccess.hRichard Henderson3-3/+3
2022-06-27target/arm: Check V7VE as well as LPAE in arm_pamaxRichard Henderson1-1/+7
2022-06-27target/arm: Extend arm_pamax to more than aarch64Richard Henderson1-8/+16
2022-06-27target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.hRichard Henderson2-36/+38
2022-06-27target/arm: Add SVL to TB flagsRichard Henderson4-1/+21
2022-06-27target/arm: Introduce sve_vqm1_for_el_smRichard Henderson2-9/+32
2022-06-27target/arm: Add cpu properties for SMERichard Henderson4-7/+124
2022-06-27target/arm: Unexport aarch64_add_*_propertiesRichard Henderson2-5/+2
2022-06-27target/arm: Move arm_cpu_*_finalize to internals.hRichard Henderson3-6/+5
2022-06-27target/arm: Generalize cpu_arm_{get, set}_default_vec_lenRichard Henderson1-13/+14
2022-06-27target/arm: Generalize cpu_arm_{get,set}_vqRichard Henderson1-14/+15
2022-06-27target/arm: Create ARMVQMapRichard Henderson4-28/+27