riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-07-04	target/loongarch: Add lock when writing timer clear reg	Xiaojuan Yang	1	-0/+2
2022-07-04	target/loongarch: Fix the meaning of ECFG reg's VS field	Xiaojuan Yang	1	-0/+4
2022-07-04	target/loongarch: Update README	Song Gao	1	-2/+37
2022-07-04	target/loongarch: Adjust functions and structure to support user-mode	Song Gao	6	-1/+72
2022-07-04	target/loongarch: remove unused include hw/loader.h	Song Gao	1	-1/+0
2022-07-04	target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong exception	Song Gao	2	-2/+4
2022-07-04	target/loongarch: Fix missing update CSR_BADV	Song Gao	1	-4/+6
2022-07-04	target/loongarch: remove badaddr from CPULoongArch	Song Gao	2	-3/+1
2022-07-03	target/riscv: Update default priority table for local interrupts	Anup Patel	2	-70/+66
2022-07-03	target/riscv: Remove CSRs that set/clear an IMSIC interrupt file bits	Anup Patel	2	-168/+6
2022-07-03	target/riscv: Set minumum priv spec version for mcountinhibit	Anup Patel	1	-1/+1
2022-07-03	target/riscv: Don't force update priv spec version to latest	Anup Patel	1	-4/+8
2022-07-03	target/riscv: Ibex: Support priv version 1.11	Alistair Francis	1	-1/+1
2022-07-03	target/riscv: Fixup MSECCFG minimum priv check	Alistair Francis	1	-1/+1
2022-07-03	target/riscv: Support mcycle/minstret write operation	Atish Patra	6	-53/+213
2022-07-03	target/riscv: Add support for hpmcounters/hpmevents	Atish Patra	3	-152/+331
2022-07-03	target/riscv: Implement mcountinhibit CSR	Atish Patra	4	-0/+32
2022-07-03	target/riscv: pmu: Make number of counters configurable	Atish Patra	3	-36/+63
2022-07-03	target/riscv: pmu: Rename the counters extension to pmu	Atish Patra	3	-5/+5
2022-07-03	target/riscv: Implement PMU CSR predicate function for S-mode	Atish Patra	1	-0/+51
2022-07-03	target/riscv: Fix PMU CSR predicate function	Atish Patra	1	-4/+7
2022-07-03	target/riscv/pmp: guard against PMP ranges with a negative size	Nicolas Pitre	1	-0/+3
2022-07-03	target/riscv: Minimize the calls to decode_save_opc	Richard Henderson	4	-9/+17
2022-07-03	target/riscv: Remove generate_exception_mtval	Richard Henderson	1	-9/+2
2022-07-03	target/riscv: Set env->bins in gen_exception_illegal	Richard Henderson	1	-0/+2
2022-07-03	target/riscv: Remove condition guarding register zero for auipc and lui	Víctor Colombo	1	-6/+2
2022-06-28	target/nios2: Move nios2-semi.c to nios2_softmmu_ss	Richard Henderson	2	-7/+2
2022-06-28	target/nios2: Eliminate nios2_semi_is_lseek	Richard Henderson	1	-36/+23
2022-06-28	target/mips: Drop pread and pwrite syscalls from semihosting	Richard Henderson	1	-32/+7
2022-06-28	target/mips: Add UHI errno values	Richard Henderson	1	-0/+40
2022-06-28	target/mips: Use an exception for semihosting	Richard Henderson	10	-21/+19
2022-06-28	target/m68k: Make semihosting system only	Richard Henderson	2	-38/+4
2022-06-28	target/m68k: Eliminate m68k_semi_is_fseek	Richard Henderson	1	-32/+23
2022-06-28	gdbstub: Adjust gdb_syscall_complete_cb declaration	Richard Henderson	2	-12/+6
2022-06-28	semihosting: Split out common-semi-target.h	Richard Henderson	2	-0/+112
2022-06-28	include/exec: Move gdb_stat and gdb_timeval to gdbstub.h	Richard Henderson	2	-54/+8
2022-06-28	include/exec: Move gdb open flags to gdbstub.h	Richard Henderson	2	-16/+0
2022-06-28	semihosting: Return void from do_common_semihosting	Richard Henderson	3	-4/+4
2022-06-28	semihosting: Move exec/softmmu-semi.h to semihosting/softmmu-uaccess.h	Richard Henderson	3	-3/+3
2022-06-27	target/arm: Check V7VE as well as LPAE in arm_pamax	Richard Henderson	1	-1/+7
2022-06-27	target/arm: Extend arm_pamax to more than aarch64	Richard Henderson	1	-8/+16
2022-06-27	target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h	Richard Henderson	2	-36/+38
2022-06-27	target/arm: Add SVL to TB flags	Richard Henderson	4	-1/+21
2022-06-27	target/arm: Introduce sve_vqm1_for_el_sm	Richard Henderson	2	-9/+32
2022-06-27	target/arm: Add cpu properties for SME	Richard Henderson	4	-7/+124
2022-06-27	target/arm: Unexport aarch64_add_*_properties	Richard Henderson	2	-5/+2
2022-06-27	target/arm: Move arm_cpu_*_finalize to internals.h	Richard Henderson	3	-6/+5
2022-06-27	target/arm: Generalize cpu_arm_{get, set}_default_vec_len	Richard Henderson	1	-13/+14
2022-06-27	target/arm: Generalize cpu_arm_{get,set}_vq	Richard Henderson	1	-14/+15
2022-06-27	target/arm: Create ARMVQMap	Richard Henderson	4	-28/+27