| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-11-05 | target/sparc: Explicitly set 2-NaN propagation rule | Peter Maydell | 2 | -2/+16 |
| 2024-11-05 | target/sparc: Move cpu_put_fsr(env, 0) call to reset | Peter Maydell | 1 | -1/+1 |
| 2024-09-20 | license: Update deprecated SPDX tag LGPL-2.0+ to LGPL-2.0-or-later | Philippe Mathieu-Daudé | 2 | -2/+2 |
| 2024-09-11 | target/sparc: Add gen_trap_if_nofpu_fpexception | Richard Henderson | 1 | -29/+61 |
| 2024-09-11 | target/sparc: Implement STDFQ | Richard Henderson | 2 | -3/+27 |
| 2024-09-11 | target/sparc: Add FSR_QNE to tb_flags | Richard Henderson | 2 | -4/+14 |
| 2024-09-11 | target/sparc: Populate sparc32 FQ when raising fp exception | Carl Hauser | 1 | -15/+25 |
| 2024-09-11 | target/sparc: Add FQ and FSR.QNE | Carl Hauser | 3 | -0/+51 |
| 2024-08-20 | target/sparc: Restrict STQF to sparcv9 | Richard Henderson | 2 | -2/+2 |
| 2024-07-23 | sparc/ldst_helper: make range overlap check more readable | Yao Xingtao | 1 | -3/+2 |
| 2024-07-11 | target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation | Peter Maydell | 1 | -0/+1 |
| 2024-06-19 | target/sparc: use signed denominator in sdiv helper | Clément Chigot | 1 | -1/+1 |
| 2024-06-05 | target/sparc: Enable VIS4 feature bit | Richard Henderson | 1 | -0/+3 |
| 2024-06-05 | target/sparc: Implement monitor ASIs | Richard Henderson | 3 | -0/+16 |
| 2024-06-05 | target/sparc: Implement MWAIT | Richard Henderson | 2 | -0/+12 |
| 2024-06-05 | target/sparc: Implement SUBXC, SUBXCcc | Richard Henderson | 2 | -0/+16 |
| 2024-06-05 | target/sparc: Implement FPMIN, FPMAX | Richard Henderson | 2 | -0/+28 |
| 2024-06-05 | target/sparc: Implement VIS4 comparisons | Richard Henderson | 4 | -47/+153 |
| 2024-06-05 | target/sparc: Implement 8-bit FPADD, FPADDS, and FPADDUS | Richard Henderson | 2 | -0/+20 |
| 2024-06-05 | target/sparc: Implement FALIGNDATAi | Richard Henderson | 2 | -3/+31 |
| 2024-06-05 | target/sparc: Add feature bit for VIS4 | Richard Henderson | 2 | -0/+3 |
| 2024-06-05 | target/sparc: Implement IMA extension | Richard Henderson | 4 | -0/+31 |
| 2024-06-05 | target/sparc: Enable VIS3 feature bit | Richard Henderson | 1 | -0/+3 |
| 2024-06-05 | target/sparc: Implement XMULX | Richard Henderson | 4 | -0/+19 |
| 2024-06-05 | target/sparc: Implement UMULXHI | Richard Henderson | 2 | -0/+9 |
| 2024-06-05 | target/sparc: Implement PDISTN | Richard Henderson | 2 | -0/+12 |
| 2024-06-05 | target/sparc: Implement MOVsTOw, MOVdTOx, MOVwTOs, MOVxTOd | Richard Henderson | 2 | -0/+42 |
| 2024-06-05 | target/sparc: Implement LZCNT | Richard Henderson | 2 | -0/+19 |
| 2024-06-05 | target/sparc: Implement LDXEFSR | Richard Henderson | 4 | -2/+17 |
| 2024-06-05 | target/sparc: Implement FSLL, FSRL, FSRA, FSLAS | Richard Henderson | 4 | -0/+58 |
| 2024-06-05 | target/sparc: Implement FPCMPEQ8, FPCMPNE8, FPCMPULE8, FPCMPUGT8 | Richard Henderson | 4 | -0/+58 |
| 2024-06-05 | target/sparc: Implement FPADDS, FPSUBS | Richard Henderson | 2 | -0/+91 |
| 2024-06-05 | target/sparc: Implement FPADD64, FPSUB64 | Richard Henderson | 2 | -0/+5 |
| 2024-06-05 | target/sparc: Implement FMEAN16 | Richard Henderson | 4 | -0/+53 |
| 2024-06-05 | target/sparc: Implement FLCMP | Richard Henderson | 4 | -0/+86 |
| 2024-06-05 | target/sparc: Implement FHADD, FHSUB, FNHADD, FNADD, FNMUL | Richard Henderson | 4 | -0/+160 |
| 2024-06-05 | target/sparc: Implement FCHKSM16 | Richard Henderson | 4 | -0/+57 |
| 2024-06-05 | target/sparc: Implement CMASK instructions | Richard Henderson | 4 | -0/+58 |
| 2024-06-05 | target/sparc: Implement ADDXC, ADDXCcc | Richard Henderson | 2 | -0/+17 |
| 2024-06-05 | target/sparc: Add feature bits for VIS 3 | Richard Henderson | 2 | -0/+5 |
| 2024-06-05 | target/sparc: Implement FMAf extension | Richard Henderson | 6 | -6/+123 |
| 2024-06-05 | target/sparc: Use gvec for VIS1 parallel add/sub | Richard Henderson | 1 | -4/+18 |
| 2024-06-05 | target/sparc: Remove cpu_fpr[] | Richard Henderson | 1 | -74/+84 |
| 2024-06-05 | target/sparc: Remove gen_dest_fpr_D | Richard Henderson | 1 | -16/+11 |
| 2024-06-05 | target/sparc: Perform DFPREG/QFPREG in decodetree | Richard Henderson | 2 | -114/+151 |
| 2024-06-05 | target/sparc: Fix helper_fmul8ulx16 | Richard Henderson | 1 | -4/+4 |
| 2024-06-05 | target/sparc: Fix do_dc | Richard Henderson | 1 | -0/+1 |
| 2024-06-05 | target/sparc: Rewrite gen_edge | Richard Henderson | 1 | -61/+37 |
| 2024-06-05 | target/sparc: Fix ARRAY8 | Richard Henderson | 1 | -18/+35 |
| 2024-05-15 | accel/tcg: Provide default implementation of disas_log | Richard Henderson | 1 | -9/+0 |
