riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
3 days	target/sparc: limit cpu_check_irqs to system emulation	Paolo Bonzini	2	-0/+4
2025-08-29	add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide	Igor Mammedov	2	-3/+3
2025-07-14	gdbstub: add the GDB register XML files for sparc64.	Rot127	1	-0/+1
2025-05-28	Merge tag 'pull-tcg-20250528' of https://gitlab.com/rth7680/qemu into staging	Stefan Hajnoczi	1	-0/+13
2025-05-28	target/sparc: Fill in TCGCPUOps.pointer_wrap	Richard Henderson	1	-0/+13
2025-05-27	target/sparc: don't set FSR_NVA when comparing unordered floats	Clément Chigot	1	-1/+0
2025-04-30	accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps	Richard Henderson	1	-1/+2
2025-04-30	accel/tcg: Return TCGTBCPUState from cpu_get_tb_cpu_state	Richard Henderson	1	-7/+10
2025-04-30	accel/tcg: Hoist cpu_get_tb_cpu_state decl to accl/tcg/cpu-ops.h	Richard Henderson	1	-3/+0
2025-04-30	accel/tcg: Introduce TCGCPUOps.cpu_exec_reset	Richard Henderson	1	-0/+1
2025-04-30	include: Remove 'exec/exec-all.h'	Philippe Mathieu-Daudé	7	-7/+0
2025-04-28	target/sparc: Use tcg_gen_addcio_tl for gen_op_addcc_int	Richard Henderson	1	-2/+1
2025-04-25	qom: Constify TypeInfo::class_data	Philippe Mathieu-Daudé	1	-1/+1
2025-04-25	qom: Have class_init() take a const data argument	Philippe Mathieu-Daudé	1	-2/+2
2025-04-25	target/sparc: Register CPUClass:list_cpus	Philippe Mathieu-Daudé	2	-4/+2
2025-04-23	tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field	Philippe Mathieu-Daudé	1	-0/+1
2025-04-23	tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally	Philippe Mathieu-Daudé	2	-24/+22
2025-04-23	tcg: Define guest_default_memory_order in TCGCPUOps	Philippe Mathieu-Daudé	1	-0/+2
2025-04-23	exec: Restrict 'cpu_ldst.h' to accel/tcg/	Philippe Mathieu-Daudé	2	-2/+2
2025-04-23	tcg: Declare TARGET_INSN_START_EXTRA_WORDS in 'cpu-param.h'	Philippe Mathieu-Daudé	2	-1/+2
2025-04-23	exec/cpu-all: remove this header	Pierrick Bouvier	1	-2/+0
2025-04-23	exec/cpu-all: transfer exec/cpu-common include to cpu.h headers	Pierrick Bouvier	1	-0/+1
2025-04-23	exec/cpu-all: remove exec/target_page include	Pierrick Bouvier	3	-0/+3
2025-04-23	exec/cpu-all: remove exec/cpu-interrupt include	Pierrick Bouvier	1	-0/+1
2025-04-23	exec/cpu-all: remove system/memory include	Pierrick Bouvier	2	-0/+2
2025-04-23	target/sparc: Restrict SoftMMU mmu_index() to TCG	Philippe Mathieu-Daudé	1	-1/+1
2025-04-23	exec/cpu-all: extract tlb flags defines to exec/tlb-flags.h	Pierrick Bouvier	1	-0/+1
2025-04-23	include/exec: Split out accel/tcg/cpu-mmu-index.h	Richard Henderson	2	-0/+2
2025-03-31	target/sparc: Log unimplemented ASI load/store accesses	Philippe Mathieu-Daudé	1	-0/+6
2025-03-31	hw/core/cpu: Use size_t for memory_rw_debug len argument	Richard Henderson	2	-2/+2
2025-03-09	target/sparc: Move has_work() from CPUClass to SysemuCPUOps	Philippe Mathieu-Daudé	1	-1/+3
2025-03-08	exec: Declare tlb_flush*() in 'exec/cputlb.h'	Philippe Mathieu-Daudé	1	-0/+1
2025-03-08	exec: Declare tlb_set_page_full() in 'exec/cputlb.h'	Philippe Mathieu-Daudé	1	-1/+1
2025-03-07	Merge tag 'accel-cpus-20250306' of https://github.com/philmd/qemu into staging	Stefan Hajnoczi	2	-2/+3
2025-03-06	target/sparc: Constify SPARCCPUClass::cpu_def	Philippe Mathieu-Daudé	1	-1/+1
2025-03-06	target: Set disassemble_info::endian value for big-endian targets	Philippe Mathieu-Daudé	1	-0/+1
2025-03-06	accel/tcg: Rename 'hw/core/tcg-cpu-ops.h' -> 'accel/tcg/cpu-ops.h'	Philippe Mathieu-Daudé	1	-1/+1
2025-03-06	qdev: Improve a few more PropertyInfo @description members	Markus Armbruster	1	-0/+1
2025-03-06	qdev: Rename PropertyInfo member @name to @type	Markus Armbruster	1	-1/+1
2025-02-18	target/sparc: fake UltraSPARC T1 PCR and PIC registers	Artyom Tarasenko	2	-1/+25
2025-02-18	target/sparc: Fix gdbstub incorrectly handling registers f32-f62	Mikael Szreder	1	-4/+14
2025-02-18	target/sparc: Fix register selection for all FTOx and FxTO instructions	Mikael Szreder	1	-6/+6
2025-02-08	target/*: Remove TARGET_LONG_BITS from cpu-param.h	Richard Henderson	1	-2/+0
2024-12-24	accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core	Richard Henderson	3	-2/+5
2024-12-24	target/sparc: Use float*_muladd_scalbn	Richard Henderson	3	-38/+54
2024-12-21	Merge tag 'exec-20241220' of https://github.com/philmd/qemu into staging	Stefan Hajnoczi	6	-72/+88
2024-12-20	accel/tcg: Include missing 'exec/translation-block.h' header	Philippe Mathieu-Daudé	1	-0/+1
2024-12-20	accel/tcg: Move tcg_cflags_has/set() to 'exec/translation-block.h'	Philippe Mathieu-Daudé	1	-0/+1
2024-12-20	target/sparc: Move sparc_restore_state_to_opc() to cpu.c	Philippe Mathieu-Daudé	4	-34/+42
2024-12-20	target/sparc: Uninline cpu_get_tb_cpu_state()	Anton Johansson	2	-37/+40