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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-11-04 19:44:28 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-06-05 09:08:39 -0700 |
| commit | 90b1433da8d51ecf0ab36d4c61eec949ee2fffbb (patch) | |
| tree | 25970c39dbeb9dd8affbc1883d89721bab4ca88b /target/sparc | |
| parent | 68a414e99d438ff5e3e598d140c8f81638a8ea9e (diff) | |
| download | qemu-90b1433da8d51ecf0ab36d4c61eec949ee2fffbb.zip qemu-90b1433da8d51ecf0ab36d4c61eec949ee2fffbb.tar.gz qemu-90b1433da8d51ecf0ab36d4c61eec949ee2fffbb.tar.bz2 | |
target/sparc: Add feature bit for VIS4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/sparc')
| -rw-r--r-- | target/sparc/cpu-feature.h.inc | 1 | ||||
| -rw-r--r-- | target/sparc/translate.c | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/target/sparc/cpu-feature.h.inc b/target/sparc/cpu-feature.h.inc index e2e6de9..be81005 100644 --- a/target/sparc/cpu-feature.h.inc +++ b/target/sparc/cpu-feature.h.inc @@ -15,3 +15,4 @@ FEATURE(CASA) FEATURE(FMAF) FEATURE(VIS3) FEATURE(IMA) +FEATURE(VIS4) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 6404065..6fa0bb6 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -2430,6 +2430,7 @@ static int extract_qfpreg(DisasContext *dc, int x) # define avail_VIS2(C) ((C)->def->features & CPU_FEATURE_VIS2) # define avail_VIS3(C) ((C)->def->features & CPU_FEATURE_VIS3) # define avail_VIS3B(C) avail_VIS3(C) +# define avail_VIS4(C) ((C)->def->features & CPU_FEATURE_VIS4) #else # define avail_32(C) true # define avail_ASR17(C) ((C)->def->features & CPU_FEATURE_ASR17) @@ -2446,6 +2447,7 @@ static int extract_qfpreg(DisasContext *dc, int x) # define avail_VIS2(C) false # define avail_VIS3(C) false # define avail_VIS3B(C) false +# define avail_VIS4(C) false #endif /* Default case for non jump instructions. */ |