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path: root/target/sparc/cpu.h
AgeCommit message (Expand)AuthorFilesLines
6 daystarget/sparc: Add FSR_QNE to tb_flagsRichard Henderson1-1/+7
6 daystarget/sparc: Add FQ and FSR.QNECarl Hauser1-0/+22
2024-04-26target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h'Philippe Mathieu-Daudé1-23/+0
2024-02-15target/sparc: Provide hint about CPUSPARCState::irq_manager memberPhilippe Mathieu-Daudé1-3/+2
2024-02-03target/sparc: Remove FSR_FTT_NMASK, FSR_FTT_CEXC_NMASKRichard Henderson1-7/+0
2024-02-03target/sparc: Split fcc out of env->fsrRichard Henderson1-11/+9
2024-02-03target/sparc: Split cexc and ftt from env->fsrRichard Henderson1-1/+6
2024-02-03target/sparc: Split ver from env->fsrRichard Henderson1-0/+3
2024-02-03target/sparc: Introduce cpu_get_fsr, cpu_put_fsrRichard Henderson1-1/+3
2024-02-03target/sparc: Remove qt0, qt1 temporariesRichard Henderson1-2/+0
2024-02-03include/exec: Change cpu_mmu_index argument to CPUStateRichard Henderson1-1/+1
2024-02-03include/exec: Implement cpu_mmu_index genericallyRichard Henderson1-6/+0
2024-02-03target/sparc: Populate CPUClass.mmu_indexRichard Henderson1-28/+6
2024-01-05target/sparc: Simplify qemu_irq_ackClément Chigot1-1/+1
2023-11-07target: Move ArchCPUClass definition to 'cpu.h'Philippe Mathieu-Daudé1-2/+16
2023-11-07target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'Philippe Mathieu-Daudé1-2/+0
2023-11-07target: Unify QOM stylePhilippe Mathieu-Daudé1-2/+0
2023-11-05target/sparc: Remove CC_OP leftoversRichard Henderson1-21/+0
2023-11-05target/sparc: Remove CC_OP_TADDTV, CC_OP_TSUBTVRichard Henderson1-2/+0
2023-11-05target/sparc: Remove CC_OP_SUB, CC_OP_SUBX, CC_OP_TSUBRichard Henderson1-3/+0
2023-11-05target/sparc: Remove CC_OP_ADD, CC_OP_ADDX, CC_OP_TADDRichard Henderson1-3/+0
2023-11-05target/sparc: Remove CC_OP_DIVRichard Henderson1-1/+0
2023-11-05target/sparc: Remove CC_OP_LOGICRichard Henderson1-1/+0
2023-11-05target/sparc: Split psr and xcc into componentsRichard Henderson1-3/+27
2023-11-05target/sparc: Introduce cpu_put_psr_iccRichard Henderson1-0/+1
2023-10-25target/sparc: Remove sparcv7 cpu featuresRichard Henderson1-14/+7
2023-10-25target/sparc: Define features via cpu-feature.h.incRichard Henderson1-19/+13
2023-10-25target/sparc: Set TCG_GUEST_DEFAULT_MORichard Henderson1-0/+23
2023-10-03accel/tcg: Move CPUNegativeOffsetState into CPUStateRichard Henderson1-1/+0
2023-07-25target/sparc: Handle FPRS correctly on big-endian hostsPeter Maydell1-1/+1
2023-06-26target: Widen pc/cs_base in cpu_get_tb_cpu_stateAnton Johansson1-2/+2
2023-06-05tcg: Remove NO_CPU_IO_DEFSRichard Henderson1-2/+0
2023-03-10linux-user/sparc: Handle floating-point exceptionsRichard Henderson1-2/+1
2023-02-27target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemuPhilippe Mathieu-Daudé1-1/+2
2022-10-26target/sparc: Convert to tcg_ops restore_state_to_opcRichard Henderson1-0/+3
2022-04-21compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau1-5/+5
2022-04-06Move CPU softfloat unions to cpu-float.hMarc-André Lureau1-0/+1
2022-03-06target: Use ArchCPU as interface to target CPUPhilippe Mathieu-Daudé1-1/+1
2022-03-06target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macroPhilippe Mathieu-Daudé1-2/+0
2022-03-06target: Use CPUArchState as interface to target-specific CPU statePhilippe Mathieu-Daudé1-3/+2
2021-09-21include/exec: Move cpu_signal_handler declarationRichard Henderson1-2/+0
2021-09-16target/sparc: Make sparc_cpu_dump_state() staticPhilippe Mathieu-Daudé1-1/+0
2021-05-04hw/sparc: Allow building without the leon3 machinePhilippe Mathieu-Daudé1-6/+0
2020-12-18linux-user/sparc: Handle tstate in sparc64_get/set_context()Peter Maydell1-4/+20
2020-12-18linux-user/sparc: Correct sparc64_get/set_context() FPU handlingPeter Maydell1-1/+3
2020-03-17gdbstub: extend GByteArray to read register helpersAlex Bennée1-1/+1
2019-11-06target/sparc: Define an enumeration for accessing env->regwptrRichard Henderson1-0/+33
2019-09-17target/sparc: Switch to do_transaction_failed() hookPeter Maydell1-3/+5
2019-09-03target/sparc: sun4u Invert Endian TTE bitTony Nguyen1-0/+2
2019-08-20configure: Define target access alignment in configuretony.nguyen@bt.com1-2/+0
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