riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-02-07	target/riscv: Ensure opcode is saved for all relevant instructions	Anup Patel	1	-0/+2
2022-03-03	target/riscv: add support for zhinx/zhinxmin	Weiwei Li	1	-95/+237
2022-02-16	target/riscv: access configuration through cfg_ptr in DisasContext	Philipp Tomsich	1	-2/+2
2021-12-20	target/riscv: zfh: implement zfhmin extension	Frank Chang	1	-8/+14
2021-12-20	target/riscv: zfh: half-precision floating-point classify	Kito Cheng	1	-0/+12
2021-12-20	target/riscv: zfh: half-precision floating-point compare	Kito Cheng	1	-0/+37
2021-12-20	target/riscv: zfh: half-precision convert and move	Kito Cheng	1	-0/+288
2021-12-20	target/riscv: zfh: half-precision computational	Kito Cheng	1	-0/+129
2021-12-20	target/riscv: zfh: half-precision load and store	Kito Cheng	1	-0/+65