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AgeCommit message (Expand)AuthorFilesLines
2020-05-21target/arm: Allow user-mode code to write CPSR.E via MSRPeter Maydell1-1/+1
2020-05-21target/arm: Use clear_vec_high more effectivelyRichard Henderson1-21/+32
2020-05-21target/arm: Use tcg_gen_gvec_mov for clear_vec_highRichard Henderson1-8/+2
2020-05-21target/arm: Remove unused GEN_NEON_INTEGER_OP macroPeter Maydell1-23/+0
2020-05-19softfloat: Name compare relation enumRichard Henderson1-1/+1
2020-05-19softfloat: Name rounding mode enumRichard Henderson1-2/+2
2020-05-19softfloat: Replace flag with boolRichard Henderson2-8/+8
2020-05-15qom: Drop parameter @errp of object_property_add() & friendsMarkus Armbruster3-12/+9
2020-05-15qom: Drop object_property_set_description() parameter @errpMarkus Armbruster2-3/+2
2020-05-14target/arm: Convert NEON VFMA, VFMS 3-reg-same insns to decodetreePeter Maydell3-174/+46
2020-05-14target/arm: Convert Neon fp VMAX/VMIN/VMAXNM/VMINNM/VRECPS/VRSQRTS to decodetreePeter Maydell3-40/+78
2020-05-14target/arm: Move 'env' argument of recps_f32 and rsqrts_f32 helpers to usual ...Peter Maydell3-6/+6
2020-05-14target/arm: Convert Neon 3-reg-same compare insns to decodetreePeter Maydell3-37/+13
2020-05-14target/arm: Convert Neon fp VMUL, VMLA, VMLS 3-reg-same insns to decodetreePeter Maydell3-16/+85
2020-05-14target/arm: Convert Neon VPMIN/VPMAX/VPADD float 3-reg-same insns to decodetreePeter Maydell3-55/+76
2020-05-14target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetreePeter Maydell6-15/+48
2020-05-14target/arm: Convert Neon VQDMULH/VQRDMULH 3-reg-same to decodetreePeter Maydell3-23/+28
2020-05-14target/arm: Convert Neon VPADD 3-reg-same insns to decodetreePeter Maydell3-18/+5
2020-05-14target/arm: Convert Neon VPMAX/VPMIN 3-reg-same insns to decodetreePeter Maydell3-15/+82
2020-05-14target/arm: Convert Neon VQSHL, VRSHL, VQRSHL 3-reg-same insns to decodetreePeter Maydell3-25/+70
2020-05-14target/arm: Convert Neon VRHADD, VHSUB 3-reg-same insns to decodetreePeter Maydell3-6/+12
2020-05-14target/arm: Convert Neon VABA/VABD 3-reg-same to decodetreePeter Maydell3-20/+12
2020-05-14target/arm: Convert Neon VHADD 3-reg-same insnsPeter Maydell3-3/+27
2020-05-14target/arm: Convert Neon 64-bit element 3-reg-same insnsPeter Maydell3-36/+39
2020-05-14target/arm: Convert Neon 3-reg-same SHA to decodetreePeter Maydell3-44/+151
2020-05-14target/arm: Convert Neon 3-reg-same VQRDMLAH/VQRDMLSH to decodetreePeter Maydell3-12/+20
2020-05-14target-arm: kvm64: handle SIGBUS signal from kernel or KVMDongjiu Geng5-4/+86
2020-05-14target/arm: Vectorize SABA/UABARichard Henderson6-33/+174
2020-05-14target/arm: Vectorize SABD/UABDRichard Henderson5-4/+176
2020-05-14target/arm: Clear tail in gvec_fmul_idx_*, gvec_fmla_idx_*Richard Henderson1-0/+2
2020-05-14target/arm: Pass pointer to qc to qrdmla/qrdmlsRichard Henderson2-34/+54
2020-05-14target/arm: Create gen_gvec_{qrdmla,qrdmls}Richard Henderson3-58/+33
2020-05-14target/arm: Remove fp_status from helper_{recpe, rsqrte}_u32Richard Henderson4-18/+8
2020-05-14target/arm: Create gen_gvec_{uqadd, sqadd, uqsub, sqsub}Richard Henderson4-135/+147
2020-05-14target/arm: Create gen_gvec_{cmtst,ushl,sshl}Richard Henderson4-102/+95
2020-05-14target/arm: Swap argument order for VSHL during decodeRichard Henderson2-4/+16
2020-05-14target/arm: Create gen_gvec_{mla,mls}Richard Henderson4-73/+71
2020-05-14target/arm: Create gen_gvec_{ceq,clt,cle,cgt,cge}0Richard Henderson3-218/+74
2020-05-14target/arm: Tidy handle_vec_simd_shriRichard Henderson1-42/+14
2020-05-14target/arm: Remove unnecessary range check for VSHLRichard Henderson1-10/+2
2020-05-14target/arm: Create gen_gvec_{sri,sli}Richard Henderson5-101/+160
2020-05-14target/arm: Create gen_gvec_{u,s}{rshr,rsra}Richard Henderson5-26/+527
2020-05-14target/arm: Create gen_gvec_[us]sraRichard Henderson5-79/+139
2020-05-14target/arm: Use correct GDB XML for M-profile coresPeter Maydell2-4/+19
2020-05-11target/arm: Fix tcg_gen_gvec_dup_imm vs DUP (indexed)Richard Henderson1-1/+5
2020-05-11target/arm: Use tcg_gen_gvec_5_ptr for sve FMLA/FCMLARichard Henderson3-162/+118
2020-05-11target/arm: Restrict TCG cpus to TCG accelPhilippe Mathieu-Daudé3-634/+665
2020-05-11target/arm/cpu: Restrict v8M IDAU interface to Aarch32 CPUsPhilippe Mathieu-Daudé1-1/+1
2020-05-11target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[]Philippe Mathieu-Daudé2-12/+12
2020-05-11target/arm: Make set_feature() available for other filesThomas Huth3-20/+10
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