riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
34 hours	accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core	Richard Henderson	4	-3/+6
34 hours	target/arm: Use float*_muladd_scalbn	Richard Henderson	1	-3/+3
4 days	Merge tag 'exec-20241220' of https://github.com/philmd/qemu into staging	Stefan Hajnoczi	17	-29/+55
5 days	Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging	Stefan Hajnoczi	1	-1/+0
5 days	accel/tcg: Include missing 'exec/translation-block.h' header	Philippe Mathieu-Daudé	2	-0/+2
5 days	accel/tcg: Move tcg_cflags_has/set() to 'exec/translation-block.h'	Philippe Mathieu-Daudé	1	-0/+1
5 days	accel/tcg: Declare cpu_loop_exit_requested() in 'exec/cpu-common.h'	Philippe Mathieu-Daudé	1	-0/+1
5 days	user: Move various declarations out of 'exec/exec-all.h'	Philippe Mathieu-Daudé	1	-0/+1
5 days	accel/tcg: Move user-related declarations out of 'exec/cpu-all.h' (4/4)	Philippe Mathieu-Daudé	1	-0/+3
5 days	accel/tcg: Move user-related declarations out of 'exec/cpu-all.h' (3/4)	Philippe Mathieu-Daudé	1	-0/+3
5 days	accel/tcg: Move user-related declarations out of 'exec/cpu-all.h' (2/4)	Philippe Mathieu-Daudé	1	-1/+3
5 days	accel/tcg: Declare mmap_[un]lock() in 'exec/page-protection.h'	Philippe Mathieu-Daudé	1	-0/+1
5 days	target/arm/mte: Restrict 'exec/ram_addr.h' to system emulation	Philippe Mathieu-Daudé	1	-0/+2
5 days	target/arm/cpu: Restrict cpu_untagged_addr() to user emulation	Philippe Mathieu-Daudé	1	-2/+3
5 days	include: Rename sysemu/ -> system/	Philippe Mathieu-Daudé	12	-27/+27
5 days	hvf: arm: Ignore writes to CNTP_CTL_EL0	Alexander Graf	1	-0/+9
6 days	include/hw/qdev-properties: Remove DEFINE_PROP_END_OF_LIST	Richard Henderson	1	-1/+0
8 days	target/arm: Enable FEAT_XS for the max cpu	Manos Pitsidianakis	1	-0/+1
8 days	target/arm: Add decodetree entry for DSB nXS variant	Manos Pitsidianakis	2	-0/+12
8 days	target/arm: Add ARM_CP_ADD_TLBI_NXS type flag to TLBI insns	Peter Maydell	1	-78/+124
8 days	target/arm: Add ARM_CP_ADD_TLBI_NXS type flag for NXS insns	Peter Maydell	2	-0/+33
8 days	target/arm: Implement fine-grained-trap handling for FEAT_XS	Peter Maydell	4	-32/+61
8 days	target/arm: Use float_status in helper_vfp_fcvt{ds,sd}	Richard Henderson	4	-13/+18
8 days	target/arm: Use float_status in helper_fcvtx_f64_to_f32	Richard Henderson	3	-4/+3
8 days	target/arm: Convert neon_helper.c to use env alias	Richard Henderson	2	-32/+30
8 days	target/arm: Convert vec_helper.c to use env alias	Richard Henderson	3	-21/+14
8 days	target/arm: Convert sme_helper.c to fpst alias	Richard Henderson	2	-6/+6
8 days	target/arm: Convert sve_helper.c to fpst alias	Richard Henderson	2	-252/+258
8 days	target/arm: Convert neon_helper.c to fpst alias	Richard Henderson	2	-21/+14
8 days	target/arm: Convert vec_helper.c to fpst alias	Richard Henderson	4	-199/+191
8 days	target/arm: Convert helper-a64.c to fpst alias	Richard Henderson	2	-112/+80
8 days	target/arm: Convert vfp_helper.c to fpst alias	Richard Henderson	2	-210/+194
8 days	target/arm: remove redundant code	Denis Rastyogin	1	-2/+0
10 days	target/arm: Constify all Property	Richard Henderson	3	-17/+17
12 days	target/arm: Simplify condition for tlbi_el2_cp_reginfo[]	Peter Maydell	1	-3/+1
12 days	target/arm: Move RME TLB insns to tlb-insns.c	Peter Maydell	2	-38/+45
12 days	target/arm: Move small helper functions to tlb-insns.c	Peter Maydell	3	-254/+220
12 days	target/arm: Move the TLBI OS insns to tlb-insns.c.	Peter Maydell	2	-80/+80
12 days	target/arm: Move TLBI range insns	Peter Maydell	3	-328/+333
12 days	target/arm: Move AArch64 EL3 TLBI insns	Peter Maydell	3	-52/+62
12 days	target/arm: Move the AArch64 EL2 TLBI insns	Peter Maydell	3	-55/+62
12 days	target/arm: Move AArch64 TLBI insns from v8_cp_reginfo[]	Peter Maydell	3	-171/+182
12 days	target/arm: Move TLBI insns for AArch32 EL2 to tlbi_insn_helper.c	Peter Maydell	4	-77/+92
12 days	target/arm: Move some TLBI insns to their own source file	Peter Maydell	6	-220/+280
12 days	target/arm: Use float_round_to_odd in helper_fcvtx_f64_to_f32	Richard Henderson	1	-15/+5
13 days	target/arm: Convert FCVTL to decodetree	Richard Henderson	2	-186/+18
13 days	target/arm: Convert URECPE and URSQRTE to decodetree	Richard Henderson	2	-134/+8
13 days	target/arm: Introduce gen_gvec_urecpe, gen_gvec_ursqrte	Richard Henderson	5	-2/+48
13 days	target/arm: Convert FRECPE, FRECPX, FRSQRTE to decodetree	Richard Henderson	2	-291/+53
13 days	target/arm: Convert handle_2misc_fcmp_zero to decodetree	Richard Henderson	4	-150/+138