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| author | Richard Henderson <richard.henderson@linaro.org> | 2020-05-07 10:23:52 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-05-11 14:22:54 +0100 |
| commit | 7e17d50ebd359ee5fa3d65d7fdc0fe0336d60694 (patch) | |
| tree | fdf6331408573ce7e328e44524f9edc9d7ee7214 /target/arm | |
| parent | 08975da9f0bfcfa654628cae71201a351ba5449a (diff) | |
| download | qemu-7e17d50ebd359ee5fa3d65d7fdc0fe0336d60694.zip qemu-7e17d50ebd359ee5fa3d65d7fdc0fe0336d60694.tar.gz qemu-7e17d50ebd359ee5fa3d65d7fdc0fe0336d60694.tar.bz2 | |
target/arm: Fix tcg_gen_gvec_dup_imm vs DUP (indexed)
DUP (indexed) can duplicate 128-bit elements, so using esz
unconditionally can assert in tcg_gen_gvec_dup_imm.
Fixes: 8711e71f9cbb
Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Message-id: 20200507172352.15418-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm')
| -rw-r--r-- | target/arm/translate-sve.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 8398c32..ac7b311 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -2044,7 +2044,11 @@ static bool trans_DUP_x(DisasContext *s, arg_DUP_x *a) unsigned nofs = vec_reg_offset(s, a->rn, index, esz); tcg_gen_gvec_dup_mem(esz, dofs, nofs, vsz, vsz); } else { - tcg_gen_gvec_dup_imm(esz, dofs, vsz, vsz, 0); + /* + * While dup_mem handles 128-bit elements, dup_imm does not. + * Thankfully element size doesn't matter for splatting zero. + */ + tcg_gen_gvec_dup_imm(MO_64, dofs, vsz, vsz, 0); } } return true; |