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path: root/target/arm/tcg/translate.c
AgeCommit message (Expand)AuthorFilesLines
2024-08-13target/arm: Fix usage of MMU indexes when EL3 is AArch32Peter Maydell1-4/+5
2024-05-28target/arm: Split out gengvec.cRichard Henderson1-1588/+0
2024-05-28target/arm: Use PLD, PLDW, PLI not NOP for t32Richard Henderson1-2/+2
2024-05-15accel/tcg: Provide default implementation of disas_logRichard Henderson1-12/+0
2024-04-09target/arm: Use insn_start from DisasContextBaseRichard Henderson1-1/+1
2024-04-02target/arm: take HSTR traps of cp15 accesses to EL2, not EL1Peter Maydell1-1/+1
2024-03-05target/arm: Support 32-byte alignment in pow2_alignRichard Henderson1-7/+1
2024-02-15target/arm: Allow access to SPSR_hyp from hyp modePeter Maydell1-6/+13
2024-01-29target: Use vaddr in gen_intermediate_codeAnton Johansson1-1/+1
2023-10-19target/arm: Permit T32 LDM with single registerPeter Maydell1-14/+23
2023-10-04accel/tcg: Replace CPUState.env_ptr with cpu_env()Richard Henderson1-3/+3
2023-10-03tcg: Rename cpu_env to tcg_envRichard Henderson1-114/+114
2023-09-16target/arm: Use tcg_gen_gvec_cmpi for compare vs 0Richard Henderson1-48/+10
2023-09-08target/arm: Implement FEAT_TIDCP1Richard Henderson1-0/+6
2023-09-08target/arm: Implement HCR_EL2.TIDCPRichard Henderson1-0/+27
2023-08-24target/arm: Use tcg_gen_negsetcond_*Richard Henderson1-8/+4
2023-08-22target/arm: Fix 64-bit SSRARichard Henderson1-1/+1
2023-07-31target/arm: Avoid writing to constant TCGv in trans_CSEL()Peter Maydell1-7/+8
2023-06-06target/arm: Introduce finalize_memop_{atom,pair}Richard Henderson1-0/+1
2023-06-05target/arm: Tidy helpers for translationRichard Henderson1-10/+3
2023-06-05accel/tcg: Introduce translator_io_startRichard Henderson1-14/+6
2023-06-05tcg: Split helper-proto.hRichard Henderson1-0/+1
2023-06-05tcg: Split helper-gen.hRichard Henderson1-5/+3
2023-06-05tcg: Pass TCGHelperInfo to tcg_gen_callNRichard Henderson1-0/+3
2023-06-05target/arm: Include helper-gen.h in translator.hRichard Henderson1-2/+0
2023-05-02target/arm: Define and use new load_cpu_field_low32()Peter Maydell1-2/+2
2023-04-03target/arm: Fix generated code for cpreg reads when HSTR is activePeter Maydell1-0/+6
2023-03-13target/arm: Improve trans_BFCIRichard Henderson1-8/+6
2023-03-05target/arm: Drop tcg_temp_free from translator.cRichard Henderson1-261/+5
2023-03-05target/arm: Remove value_global from DisasCompareRichard Henderson1-5/+0
2023-03-05target/arm: Remove arm_free_cc, a64_free_ccRichard Henderson1-9/+0
2023-03-05accel/tcg: Remove translator_loop_temp_checkRichard Henderson1-1/+0
2023-03-01target/arm: Don't use tcg_temp_local_new_*Richard Henderson1-3/+3
2023-03-01accel/tcg: Pass max_insn to gen_intermediate_code by pointerRichard Henderson1-1/+1
2023-03-01target/arm: Replace `TARGET_TB_PCREL` with `CF_PCREL`Anton Johansson1-3/+3
2023-02-27target/arm: move translate modules to tcg/Fabiano Rosas1-0/+9990