riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-04-20	target/arm: Implement FEAT_PAN3	Peter Maydell	1	-0/+5
2023-03-06	target/arm: Diagnose incorrect usage of arm_is_secure subroutines	Richard Henderson	1	-1/+4
2023-03-06	target/arm: Handle m-profile in arm_is_secure	Richard Henderson	1	-0/+3
2023-03-06	target/arm: Implement gdbstub m-profile systemreg and secext	Richard Henderson	1	-0/+2
2023-03-06	target/arm: Move arm_gen_dynamic_svereg_xml to gdbstub64.c	Richard Henderson	1	-6/+0
2023-03-06	target/arm: Unexport arm_gen_dynamic_sysreg_xml	Richard Henderson	1	-1/+0
2023-02-27	target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu	Philippe Mathieu-Daudé	1	-1/+1
2023-02-16	target/arm: Move cpregs code out of cpu.h	Fabiano Rosas	1	-91/+0
2023-02-16	target/arm: Declare CPU <-> NVIC helpers in 'hw/intc/armv7m_nvic.h'	Philippe Mathieu-Daudé	1	-123/+0
2023-02-16	target/arm: Store CPUARMState::nvic as NVICState*	Philippe Mathieu-Daudé	1	-22/+24
2023-02-16	target/arm: Restrict CPUARMState::nvic to sysemu	Philippe Mathieu-Daudé	1	-1/+1
2023-02-16	target/arm: Restrict CPUARMState::arm_boot_info to sysemu	Philippe Mathieu-Daudé	1	-1/+1
2023-02-16	target/arm: Restrict CPUARMState::gicv3state to sysemu	Philippe Mathieu-Daudé	1	-1/+2
2023-02-16	target/arm: Avoid resetting CPUARMState::eabi field	Philippe Mathieu-Daudé	1	-5/+4
2023-02-16	target/arm: Convert CPUARMState::eabi to boolean	Philippe Mathieu-Daudé	1	-1/+1
2023-02-03	target/arm: Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 traps	Peter Maydell	1	-0/+1
2023-02-03	target/arm: Implement the HFGITR_EL2.ERET trap	Peter Maydell	1	-0/+1
2023-02-03	target/arm: Implement FGT trapping infrastructure	Peter Maydell	1	-0/+1
2023-02-03	target/arm: Define the FEAT_FGT registers	Peter Maydell	1	-0/+15
2023-01-23	target/arm: implement DBGCLAIM registers	Evgeny Iakovlev	1	-0/+1
2023-01-23	target/arm/sme: Reset SVE state in aarch64_set_svcr()	Richard Henderson	1	-1/+0
2023-01-23	target/arm/sme: Introduce aarch64_set_svcr()	Richard Henderson	1	-0/+1
2023-01-23	target/arm: Widen cnthctl_el2 to uint64_t	Richard Henderson	1	-1/+1
2023-01-05	target/arm: Add PMSAv8r registers	Tobias Röhmel	1	-0/+6
2022-12-15	target/arm: Allow relevant HCR bits to be written for FEAT_EVT	Peter Maydell	1	-0/+30
2022-10-27	target/arm: Add isar predicates for FEAT_HAFDBS	Richard Henderson	1	-0/+10
2022-10-27	target/arm: Implement FEAT_E0PD	Peter Maydell	1	-0/+5
2022-10-26	accel/tcg: Make page_alloc_target_data allocation constant	Richard Henderson	1	-0/+8
2022-10-20	target/arm: Use softmmu tlbs for page table walking	Richard Henderson	1	-0/+5
2022-10-20	target/arm: Move ARMMMUIdx_Stage2 to a real tlb mmu_idx	Richard Henderson	1	-10/+13
2022-10-20	target/arm: Add ARMMMUIdx_Phys_{S,NS}	Richard Henderson	1	-1/+6
2022-10-20	target/arm: Use probe_access_full for BTI	Richard Henderson	1	-13/+0
2022-10-20	target/arm: Use probe_access_full for MTE	Richard Henderson	1	-1/+0
2022-10-12	Merge tag 'pull-target-arm-20221010' of https://git.linaro.org/people/pmaydel...	Stefan Hajnoczi	1	-80/+101
2022-10-10	target/arm: Don't allow guest to use unimplemented granule sizes	Peter Maydell	1	-0/+33
2022-10-10	target/arm: Introduce arm_hcr_el2_eff_secstate	Richard Henderson	1	-7/+13
2022-10-10	target/arm: Fold secure and non-secure a-profile mmu indexes	Richard Henderson	1	-46/+26
2022-10-10	target/arm: Add TBFLAG_M32.SECURE	Richard Henderson	1	-0/+2
2022-10-10	target/arm: allow setting SCR_EL3.EnTP2 when FEAT_SME is implemented	Jerome Forissier	1	-27/+27
2022-10-06	dump: Replace opaque DumpState pointer with a typed one	Janosch Frank	1	-2/+2
2022-09-29	target/arm: Update SDCR_VALID_MASK to include SCCD	Peter Maydell	1	-1/+7
2022-09-14	target/arm: Support 64-bit event counters for FEAT_PMUv3p5	Peter Maydell	1	-0/+1
2022-09-14	target/arm: Implement FEAT_PMUv3p5 cycle counter disable bits	Peter Maydell	1	-0/+20
2022-09-14	target/arm: Rename pmu_8_n feature test functions	Peter Maydell	1	-8/+8
2022-09-14	target/arm: Implement ID_DFR1	Peter Maydell	1	-0/+1
2022-09-14	target/arm: Implement ID_MMFR5	Peter Maydell	1	-0/+1
2022-07-26	target/arm: Add MO_128 entry to pred_esz_masks[]	Peter Maydell	1	-1/+1
2022-07-18	target/arm: Honour VTCR_EL2 bits in Secure EL2	Peter Maydell	1	-0/+19
2022-07-18	target/arm: Store TCR_EL* registers as uint64_t	Peter Maydell	1	-7/+1
2022-07-18	target/arm: Store VTCR_EL2, VSTCR_EL2 registers as uint64_t	Peter Maydell	1	-2/+2