| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-09-10 | gdbstub: Add support for MTE in system mode | Gustavo Romero | 1 | -2/+4 |
| 2024-09-10 | gdbstub: Use specific MMU index when probing MTE addresses | Gustavo Romero | 1 | -4/+13 |
| 2024-09-05 | target/arm: Correct names of VFP VFNMA and VFNMS insns | Peter Maydell | 2 | -10/+10 |
| 2024-09-05 | target/arm: Enable FEAT_EBF16 in the "max" CPU | Peter Maydell | 2 | -3/+2 |
| 2024-09-05 | target/arm: Implement FPCR.EBF=1 semantics for bfdotadd() | Peter Maydell | 1 | -3/+54 |
| 2024-09-05 | target/arm: Prepare bfdotadd() callers for FEAT_EBF support | Peter Maydell | 3 | -65/+193 |
| 2024-09-05 | target/arm: Pass env pointer through to gvec_bfmmla helper | Peter Maydell | 5 | -7/+8 |
| 2024-09-05 | target/arm: Pass env pointer through to gvec_bfdot_idx helper | Peter Maydell | 5 | -7/+22 |
| 2024-09-05 | target/arm: Pass env pointer through to gvec_bfdot helper | Peter Maydell | 5 | -7/+77 |
| 2024-09-05 | target/arm: Pass env pointer through to sme_bfmopa helper | Peter Maydell | 3 | -5/+5 |
| 2024-09-05 | target/arm: Allow setting the FPCR.EBF bit for FEAT_EBF16 | Peter Maydell | 3 | -2/+12 |
| 2024-08-13 | target/arm: Fix usage of MMU indexes when EL3 is AArch32 | Peter Maydell | 8 | -34/+81 |
| 2024-08-13 | target/arm: Update translation regime comment for new features | Peter Maydell | 1 | -7/+16 |
| 2024-08-13 | target/arm: Clear high SVE elements in handle_vec_simd_wshli | Richard Henderson | 1 | -0/+1 |
| 2024-08-09 | target/arm: Fix BTI versus CF_PCREL | Richard Henderson | 4 | -52/+56 |
| 2024-08-03 | hvf: arm: Fix hvf_sysreg_read_cp() call | Akihiko Odaki | 1 | -1/+1 |
| 2024-08-01 | target/arm: Handle denormals correctly for FMOPA (widening) | Peter Maydell | 3 | -15/+51 |
| 2024-07-29 | target/arm: Ignore SMCR_EL2.LEN and SVCR_EL2.LEN if EL2 is not enabled | Peter Maydell | 1 | -1/+1 |
| 2024-07-29 | target/arm: Avoid shifts by -1 in tszimm_shr() and tszimm_shl() | Peter Maydell | 1 | -2/+16 |
| 2024-07-29 | target/arm: Fix UMOPA/UMOPS of 16-bit values | Peter Maydell | 1 | -4/+4 |
| 2024-07-29 | target/arm: Don't assert for 128-bit tile accesses when SVL is 128 | Peter Maydell | 1 | -1/+9 |
| 2024-07-29 | hvf: arm: Do not advance PC when raising an exception | Akihiko Odaki | 1 | -3/+3 |
| 2024-07-29 | hvf: arm: Properly disable PMU | Akihiko Odaki | 1 | -87/+97 |
| 2024-07-29 | hvf: arm: Raise an exception for sysreg by default | Akihiko Odaki | 1 | -89/+85 |
| 2024-07-29 | target/arm/kvm: Do not silently remove PMU | Akihiko Odaki | 1 | -5/+0 |
| 2024-07-29 | target/arm/kvm: Set PMU for host only when available | Akihiko Odaki | 1 | -1/+1 |
| 2024-07-23 | bsd-user: Make compile for non-linux user-mode stuff | Warner Losh | 1 | -0/+4 |
| 2024-07-23 | bsd-user: Hard wire aarch64 to be 4k pages only | Warner Losh | 1 | -0/+4 |
| 2024-07-23 | Merge tag 'pull-tcg-20240723' of https://gitlab.com/rth7680/qemu into staging | Richard Henderson | 3 | -11/+61 |
| 2024-07-23 | target/arm: Use set/clear_helper_retaddr in SVE and SME helpers | Richard Henderson | 2 | -9/+49 |
| 2024-07-23 | target/arm: Use set/clear_helper_retaddr in helper-a64.c | Richard Henderson | 1 | -2/+12 |
| 2024-07-22 | gdbstub: Re-factor gdb command extensions | Alex Bennée | 3 | -19/+12 |
| 2024-07-18 | hvf: arm: Do not advance PC when raising an exception | Akihiko Odaki | 1 | -0/+1 |
| 2024-07-18 | target/arm: Use FPST_F16 for SME FMOPA (widening) | Richard Henderson | 1 | -4/+8 |
| 2024-07-18 | target/arm: Use float_status copy in sme_fmopa_s | Daniyal Khan | 1 | -1/+1 |
| 2024-07-18 | target/arm: LDAPR should honour SCTLR_ELx.nAA | Peter Maydell | 1 | -1/+1 |
| 2024-07-18 | target/arm: Fix handling of LDAPR/STLR with negative offset | Peter Maydell | 1 | -1/+1 |
| 2024-07-11 | target/arm: Convert PMULL to decodetree | Richard Henderson | 2 | -82/+15 |
| 2024-07-11 | target/arm: Convert ADDHN, SUBHN, RADDHN, RSUBHN to decodetree | Richard Henderson | 2 | -71/+61 |
| 2024-07-11 | target/arm: Convert SADDW, SSUBW, UADDW, USUBW to decodetree | Richard Henderson | 2 | -43/+48 |
| 2024-07-11 | target/arm: Convert SQDMULL, SQDMLAL, SQDMLSL to decodetree | Richard Henderson | 2 | -499/+138 |
| 2024-07-11 | target/arm: Convert SADDL, SSUBL, SABDL, SABAL, and unsigned to decodetree | Richard Henderson | 2 | -72/+87 |
| 2024-07-11 | target/arm: Convert SMULL, UMULL, SMLAL, UMLAL, SMLSL, UMLSL to decodetree | Richard Henderson | 2 | -50/+156 |
| 2024-07-11 | target/arm: Set arm_v7m_tcg_ops cpu_exec_halt to arm_cpu_exec_halt() | Peter Maydell | 3 | -1/+5 |
| 2024-07-11 | target/arm: Use cpu_env in cpu_untagged_addr | Richard Henderson | 1 | -2/+2 |
| 2024-07-11 | target/arm: Allow FPCR bits that aren't in FPSCR | Peter Maydell | 1 | -21/+35 |
| 2024-07-11 | target/arm: Rename FPSR_MASK and FPCR_MASK and define them symbolically | Peter Maydell | 3 | -11/+40 |
| 2024-07-11 | target/arm: Rename FPCR_ QC, NZCV macros to FPSR_ | Peter Maydell | 5 | -24/+27 |
| 2024-07-11 | target/arm: Store FPSR and FPCR in separate CPU state fields | Peter Maydell | 6 | -27/+28 |
| 2024-07-11 | target/arm: Implement store_cpu_field_low32() macro | Peter Maydell | 1 | -0/+7 |
