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9 daysplugins/api: split out binary path/start/end/entry codeAlex Bennée2-0/+16
To move the main api.c to a single build compilation object we need to start splitting out user and system specific code. As we need to grob around host headers we move these particular helpers into the *-user mode directories. The binary/start/end/entry helpers are all NOPs for system mode. While using the plugin-api.c.inc trick means we build for both linux-user and bsd-user the BSD user-mode command line is still missing -plugin. This can be enabled once we have reliable check-tcg tests working for the BSDs. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250304222439.2035603-27-alex.bennee@linaro.org>
10 daysuser: Prefer cached CpuClass over CPU_GET_CLASS() macroPhilippe Mathieu-Daudé1-2/+2
CpuState caches its CPUClass since commit 6fbdff87062 ("cpu: cache CPUClass in CPUState for hot code paths"), use it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250122093028.52416-7-philmd@linaro.org>
10 daysuser: Extract common MMAP API to 'user/mmap.h'Philippe Mathieu-Daudé1-11/+1
Keep common MMAP-related declarations in a single place. Note, this disable ThreadSafetyAnalysis on Linux for: - mmap_fork_start() - mmap_fork_end(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250308122842.76377-4-philmd@linaro.org>
10 daysbsd-user: Propagate alignment argument to mmap_find_vma()Philippe Mathieu-Daudé3-10/+6
Propagate the alignment to mmap_find_vma(), effectively embedding mmap_find_vma_aligned() within mmap_find_vma(). Add a comment in do_bsd_shmat() to clarify alignment above page size is not required. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Message-Id: <20250308122842.76377-3-philmd@linaro.org>
10 daysbsd-user: Always use mmap_find_vma_aligned() in target_mmap()Philippe Mathieu-Daudé1-5/+4
Massage target_mmap(): calculate alignment once, then unconditionally call mmap_find_vma_aligned(). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Message-Id: <20250308122842.76377-2-philmd@linaro.org>
13 daysaccel/tcg: Rename 'hw/core/tcg-cpu-ops.h' -> 'accel/tcg/cpu-ops.h'Philippe Mathieu-Daudé1-1/+1
TCGCPUOps structure makes more sense in the accelerator context rather than hardware emulation. Move it under the accel/tcg/ scope. Mechanical change doing: $ sed -i -e 's,hw/core/tcg-cpu-ops.h,accel/tcg/cpu-ops.h,g' \ $(git grep -l hw/core/tcg-cpu-ops.h) Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-11-philmd@linaro.org>
13 daysqemu/compiler: Absorb 'clang-tsa.h'Philippe Mathieu-Daudé1-1/+0
We already have "qemu/compiler.h" for compiler-specific arrangements, automatically included by "qemu/osdep.h" for each source file. No need to explicitly include a header for a Clang particularity. Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250117170201.91182-1-philmd@linaro.org>
2025-02-10gdbstub: Allow late attachmentIlya Leoshkevich1-1/+0
Allow debugging individual processes in multi-process applications by starting them with export QEMU_GDB=/tmp/qemu-%d.sock,suspend=n. Currently one would have to attach to every process to ensure the app makes progress. In case suspend=n is not specified, the flow remains unchanged. If it is specified, then accepting the client connection is delegated to a thread. In the future this machinery may be reused for handling reconnections and interruptions. On accepting a connection, the thread schedules gdb_handlesig() on the first CPU and wakes it up with host_interrupt_signal. Note that the result of this gdb_handlesig() invocation is handled, as opposed to many other existing call sites. These other call sites probably need to be fixed separately. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20250117001542.8290-7-iii@linux.ibm.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250207153112.3939799-16-alex.bennee@linaro.org>
2025-02-10user: Introduce host_interrupt_signalIlya Leoshkevich1-0/+12
Attaching to the gdbstub of a running process requires stopping its threads. For threads that run on a CPU, cpu_exit() is enough, but the only way to grab attention of a thread that is stuck in a long-running syscall is to interrupt it with a signal. Reserve a host realtime signal for this, just like it's already done for TARGET_SIGABRT on Linux. This may reduce the number of available guest realtime signals by one, but this is acceptable, since there are quite a lot of them, and it's unlikely that there are apps that need them all. Set signal_pending for the safe_sycall machinery to prevent invoking the syscall. This is a lie, since we don't queue a guest signal, but process_pending_signals() can handle the absence of pending signals. The syscall returns with QEMU_ERESTARTSYS errno, which arranges for the automatic restart. This is important, because it helps avoiding disturbing poorly written guests. Reviewed-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20250117001542.8290-5-iii@linux.ibm.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250207153112.3939799-14-alex.bennee@linaro.org>
2025-02-10user: Introduce user/signal.hIlya Leoshkevich2-1/+1
gdbstub needs target_to_host_signal(), so move its declaration to a public header. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20250117001542.8290-4-iii@linux.ibm.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250207153112.3939799-13-alex.bennee@linaro.org>
2025-01-17system: propagate Error to gdbserver_start (and other device setups)Alex Bennée1-1/+1
This started as a clean-up to properly pass a Error handler to the gdbserver_start so we could do the right thing for command line and HMP invocations. Now that we have cleaned up foreach_device_config_or_exit() in earlier patches we can further simplify by it by passing &error_fatal instead of checking the return value. Having a return value is still useful for HMP though so tweak the return to use a simple bool instead. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250116160306.1709518-11-alex.bennee@linaro.org>
2024-12-20user: Move various declarations out of 'exec/exec-all.h'Philippe Mathieu-Daudé1-0/+1
Move various declarations related to user emulation from "exec/exec-all.h" to "user/cpu_loop.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-19-philmd@linaro.org>
2024-12-20user: Declare cpu_loop() once in 'user/cpu_loop.h'Philippe Mathieu-Daudé6-6/+6
Declare cpu_loop() once in "user/cpu_loop.h". bsd-user gets the G_NORETURN attribute. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-18-philmd@linaro.org>
2024-12-20accel/tcg: Move user-related declarations out of 'exec/cpu-all.h' (4/4)Philippe Mathieu-Daudé1-0/+1
Move declarations related to page protection under user emulation from "exec/cpu-all.h" to "user/page-protection.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-15-philmd@linaro.org>
2024-12-20accel/tcg: Move user-related declarations out of 'exec/cpu-all.h' (3/4)Philippe Mathieu-Daudé1-0/+1
Move declarations related to page protection under user emulation from "exec/cpu-all.h" to "user/page-protection.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-14-philmd@linaro.org>
2024-12-20accel/tcg: Move user-related declarations out of 'exec/cpu-all.h' (2/4)Philippe Mathieu-Daudé1-0/+1
Move declarations related to page protection under user emulation from "exec/cpu-all.h" to "user/page-protection.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-13-philmd@linaro.org>
2024-12-20accel/tcg: Move user-related declarations out of 'exec/cpu-all.h' (1/4)Philippe Mathieu-Daudé2-0/+2
Move declarations related to page protection under user emulation from "exec/cpu-all.h" to "user/page-protection.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-12-philmd@linaro.org>
2024-11-04bsd-user: Set TaskState ts_tid for initial threadsJessica Clarke1-0/+1
Currently we only set it on fork. Note: Upstream (blitz) commit also did new threads, but that code isn't in qemu project repo yet. Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Pull-Request: https://github.com/qemu-bsd-user/qemu-bsd-user/pull/52 Reviewed-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Warner Losh <imp@bsdimp.com>
2024-11-04bsd-user/main: Allow setting tb-sizeIlya Leoshkevich1-0/+9
While qemu-system can set tb-size using -accel tcg,tb-size=n, there is no similar knob for qemu-bsd-user. Add one in a way similar to how one-insn-per-tb is already handled. Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Warner Losh <imp@bsdimp.com>
2024-11-04bsd-user/x86_64/target_arch_thread.h: Align stackIlya Leoshkevich1-1/+1
bsd-user qemu-x86_64 almost immediately dies with: qemu: 0x4002201a68: unhandled CPU exception 0xd - aborting on FreeBSD 14.1-RELEASE. This is an instruction that requires alignment: (gdb) x/i 0x4002201a68 0x4002201a68: movaps %xmm0,-0x40(%rbp) and the argument is not aligned: (gdb) p/x env->regs[5] $1 = 0x822443b58 A quick experiment shows that the userspace entry point expects misaligned rsp: (gdb) starti (gdb) p/x $rsp $1 = 0x7fffffffeaa8 Emulate this behavior in bsd-user. [[ applied Richard's suggestion ]] Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Warner Losh <imp@bsdimp.com>
2024-10-02bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCVMark Corbin1-0/+54
Added implementations for 'set_mcontext' and 'get_ucontext_sigreturn' functions for RISC-V architecture, Both functions ensure that the CPU state and user context are properly managed. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Co-authored-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-17-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Implement 'get_mcontext' for RISC-VMark Corbin1-0/+53
Added the 'get_mcontext' function to extract and populate the RISC-V machine context from the CPU state. This function is used to gather the current state of the general-purpose registers and store it in a 'target_mcontext_' structure. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Co-authored-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-16-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Implement RISC-V signal trampoline setup functionsMark Corbin1-0/+63
Added functions for setting up the RISC-V signal trampoline and signal frame: 'set_sigtramp_args()': Configures the RISC-V CPU state with arguments for the signal handler. It sets up the registers with the signal number,pointers to the signal info and user context, the signal handler address, and the signal frame pointer. 'setup_sigframe_arch()': Initializes the signal frame with the current machine context.This function copies the context from the CPU state to the signal frame, preparing it for the signal handler. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Co-authored-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-15-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Define RISC-V signal handling structures and constantsMark Corbin1-0/+75
Added definitions for RISC-V signal handling, including structures and constants for managing signal frames and context Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Co-authored-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-14-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Add generic RISC-V64 target definitionsWarner Losh1-0/+20
Added a generic definition for RISC-V64 target-specific details. Implemented the 'regpairs_aligned' function,which returns 'false' to indicate that register pairs are not aligned in the RISC-V64 ABI. Signed-off-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-13-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Define RISC-V system call structures and constantsMark Corbin1-0/+38
Introduced definitions for the RISC-V system call interface, including the 'target_pt_regs' structure that outlines the register storage layout during a system call. Added constants for hardware machine identifiers. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Co-authored-by: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-12-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Define RISC-V VM parameters and helper functionsMark Corbin1-0/+53
Added definitions for RISC-V VM parameters, including maximum and default sizes for text, data, and stack, as well as address space limits. Implemented helper functions for retrieving and setting specific values in the CPU state, such as stack pointer and return values. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-11-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Add RISC-V thread setup and initialization supportMark Corbin1-0/+47
Implemented functions for setting up and initializing threads in the RISC-V architecture. The 'target_thread_set_upcall' function sets up the stack pointer, program counter, and function argument for new threads. The 'target_thread_init' function initializes thread registers based on the provided image information. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Co-authored-by: Jessica Clarke <jrtc27@jrtc27.com> Co-authored-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-10-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Implement RISC-V sysarch system call emulationMark Corbin1-0/+41
Added the 'do_freebsd_arch_sysarch' function to emulate the 'sysarch' system call for the RISC-V architecture. Currently, this function returns '-TARGET_EOPNOTSUPP' to indicate that the operation is not supported. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-9-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Add RISC-V signal trampoline setup functionMark Corbin1-0/+41
Implemented the 'setup_sigtramp' function for setting up the signal trampoline code in the RISC-V architecture. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-8-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Define RISC-V register structures and register copyingMark Corbin1-0/+88
Added definitions for RISC-V register structures, including general-purpose registers and floating-point registers, in 'target_arch_reg.h'. Implemented the 'target_copy_regs' function to copy register values from the CPU state to the target register structure, ensuring proper endianness handling using 'tswapreg'. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-7-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Add RISC-V ELF definitions and hardware capability detectionMark Corbin1-0/+42
Introduced RISC-V specific ELF definitions and hardware capability detection. Additionally, a function to retrieve hardware capabilities ('get_elf_hwcap') is implemented, which returns the common bits set in each CPU's ISA strings. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Co-authored-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-6-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Implement RISC-V TLS register setupMark Corbin2-0/+56
Included the prototype for the 'target_cpu_set_tls' function in the 'target_arch.h' header file. This function is responsible for setting the Thread Local Storage (TLS) register for RISC-V architecture. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-5-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Implement RISC-V CPU register cloning and reset functionsMark Corbin1-0/+14
Added functions for cloning CPU registers and resetting the CPU state for RISC-V architecture. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-4-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Add RISC-V CPU execution loop and syscall handlingMark Corbin1-0/+94
Implemented the RISC-V CPU execution loop, including handling various exceptions and system calls. The loop continuously executes CPU instructions,processes exceptions, and handles system calls by invoking FreeBSD syscall handlers. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Co-authored-by: Jessica Clarke <jrtc27@jrtc27.com> Co-authored-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-3-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02bsd-user: Implement RISC-V CPU initialization and main loopMark Corbin1-0/+40
Added the initial implementation for RISC-V CPU initialization and main loop. This includes setting up the general-purpose registers and program counter based on the provided target architecture definitions. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Co-authored-by: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-2-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-08-21bsd-user: Handle short reads in mmap_h_gt_gRichard Henderson1-2/+36
In particular, if an image has a large bss, we can hit EOF before reading all bytes of the mapping. Mirror the similar change to linux-user. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240820050848.165253-3-richard.henderson@linaro.org>
2024-07-24bsd-user: Add target.h for aarch64.Warner Losh1-0/+20
For aarch64, it's a 64-bit API, so there's no pairing of registers for 64-bit values. Signed-off-by: Warner Losh <imp@bsdimp.com>
2024-07-23bsd-user: Define TARGET_SIGSTACK_ALIGN and use it to round stackWarner Losh5-8/+9
Most (all?) targets require stacks to be properly aligned. Rather than a series of ifdefs in bsd-user/signal.h, instead use a manditory #define for all architectures. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2024-07-23bsd-user: Sync fork_start/fork_end with linux-userJessica Clarke1-12/+14
This reorders some of the calls, deduplicates code between branches and, most importantly, fixes a double end_exclusive call in the parent that will cause exclusive_context_count to go negative. Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Pull-Request: https://github.com/qemu-bsd-user/qemu-bsd-user/pull/52 Reviewed-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2024-07-23bsd-user: Simplify the implementation of execveDoug Rabson2-133/+3
This removes the logic which prepends the emulator to each call to execve and fexecve. This is not necessary with the existing imgact_binmisc support and it avoids the need to install the emulator binary into jail environments when using 'binmiscctl --pre-open'. Signed-off-by: Doug Rabson <dfr@rabson.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Warner Losh <imp@bsdimp.com> Acked-by: Richard Henderson <richard.henderson@linaro.org>
2024-07-23bsd-user:Add AArch64 improvements and signal handling functionsStacey Son5-8/+26
Added get_ucontext_sigreturn function to check processor state ensuring current execution mode is EL0 and no flags indicating interrupts or exceptions are set. Updated AArch64 code to use CF directly without reading/writing the entire processor state, improving efficiency. Changed FP data structures to use Int128 instead of __uint128_t, leveraging QEMU's generic mechanism for referencing this type. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-9-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>
2024-07-23bsd-user:Add set_mcontext function for ARM AArch64Stacey Son1-0/+22
The function copies register values from the provided target_mcontext_t structure to the CPUARMState registers. Note:FP is unfinished upstream but will be a separate commit coming soon. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-8-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>
2024-07-23bsd-user:Add setup_sigframe_arch function for ARM AArch64Warner Losh1-0/+14
The function utilizes the `get_mcontext` function to retrieve the machine context for the current CPUARMState Signed-off-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-7-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>
2024-07-23bsd-user:Add get_mcontext function for ARM AArch64Stacey Son1-0/+30
function to retrieve machine context,it populates the provided target_mcontext_t structure with information from the CPUARMState registers. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Co-authored-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-6-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>
2024-07-23bsd-user:Add ARM AArch64 signal handling supportStacey Son3-0/+181
Added sigcode setup function for signal trampoline which initializes a sequence of instructions to handle signal returns and exits, copying this code to the target offset. Defined ARM AArch64 specific signal definitions including register indices and sizes, and introduced structures to represent general purpose registers, floating point registers, and machine context. Added function to set up signal handler arguments, populating register values in `CPUARMState` based on the provided signal, signal frame, signal action, and frame address. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Co-authored-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-5-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>
2024-07-23bsd-user:Add ARM AArch64 support and capabilitiesWarner Losh3-0/+170
Added function to access rval2 by accessing the x1 register. Defined ARM AArch64 ELF parameters including mmap and dynamic load addresses. Introduced extensive hardware capability definitions and macros for retrieving hardware capability (hwcap) flags. Implemented function to retrieve ARM AArch64 hardware capabilities using the `GET_FEATURE_ID` macro. Added function to retrieve extended ARM AArch64 hardware capability flags. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Co-authored-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-4-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>
2024-07-23bsd-user:Add AArch64 register handling and related functionsStacey Son5-0/+255
Added header file for managing CPU register states in FreeBSD user mode. Introduced prototypes for setting and getting thread-local storage (TLS). Implemented AArch64 sysarch() system call emulation and a printing function. Added function for setting up thread upcall to add thread support to BSD-USER. Initialized thread's register state during thread setup. Updated ARM AArch64 VM parameter definitions for bsd-user, including address spaces for FreeBSD/arm64 and a function for getting the stack pointer from CPU and setting a return value. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Co-authored-by: Jessica Clarke <jrtc27@jrtc27.com> Co-authored-by: Sean Bruno <sbruno@freebsd.org> Co-authored-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-3-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>
2024-07-23bsd-user:Add CPU initialization and management functionsStacey Son3-0/+274
Added function to initialize ARM CPU and check if it supports 64-bit mode. Implemented CPU loop function to handle exceptions and emulate execution of instructions. Added function to clone CPU state to create a new thread. Included AArch64 specific CPU functions for bsd-user to set and receive thread-local-storage value from the tpidr_el0 register. Introduced structure for storing CPU register states for BSD-USER. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Co-authored-by: Kyle Evans <kevans@freebsd.org> Co-authored-by: Sean Bruno <sbruno@freebsd.org> Co-authored-by: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-2-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>
2024-06-09bsd-user: Catch up to run-time reserved_va mathWarner Losh1-12/+27
Catch up to linux-user's 8f67b9c694d0, 13c13397556a, 2f7828b57293, and 95059f9c313a by Richard Henderson which made reserved_va a run-time calculation, defaulting to nothing except in the case of 64-bit host 32-bit target. Also include the adjustment of the comment heading that work submitted in the same patch stream. Since this is a direct copy, squash it into one patch rather than follow the Linux evolution since breaking this down further at this point doesn't make sense for this "new code". Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.1 at 2025-03-19 06:35:24 +0000