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author | Frank Chang <frank.chang@sifive.com> | 2021-12-10 15:56:53 +0800 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2021-12-20 14:53:31 +1000 |
commit | d6c4d3f2a693f4520ec72b0bd25be6ec03fee13a (patch) | |
tree | 4bade95dfa1972d7c5580ae13f9d140e2977e2be /target/riscv/cpu.c | |
parent | f714361ed79180a9780334cfe1b89b69f6c9bfe9 (diff) | |
download | qemu-d6c4d3f2a693f4520ec72b0bd25be6ec03fee13a.zip qemu-d6c4d3f2a693f4520ec72b0bd25be6ec03fee13a.tar.gz qemu-d6c4d3f2a693f4520ec72b0bd25be6ec03fee13a.tar.bz2 |
target/riscv: rvv-1.0: trigger illegal instruction exception if frm is not valid
If the frm field contains an invalid rounding mode (101-111),
attempting to execute any vector floating-point instruction, even
those that do not depend on the rounding mode, will raise an illegal
instruction exception.
Call gen_set_rm() with DYN rounding mode to check and trigger illegal
instruction exception if frm field contains invalid value at run-time
for vector floating-point instructions.
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20211210075704.23951-68-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/cpu.c')
0 files changed, 0 insertions, 0 deletions