index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target
/
riscv
/
cpu.c
Age
Commit message (
Expand
)
Author
Files
Lines
2024-07-18
target/riscv: Expose the Smcntrpmf config
Atish Patra
1
-0
/
+1
2024-07-18
target/riscv: Add cycle & instret privilege mode filtering properties
Kaiwen Xue
1
-0
/
+1
2024-07-18
target/riscv: Expose zabha extension as a cpu property
LIU Zhiwei
1
-0
/
+2
2024-07-18
target/riscv: Support Zama16b extension
LIU Zhiwei
1
-0
/
+2
2024-07-18
target/riscv: Add zcmop extension
LIU Zhiwei
1
-0
/
+2
2024-07-18
target/riscv: Add zimop extension
LIU Zhiwei
1
-0
/
+2
2024-07-11
target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation
Peter Maydell
1
-1
/
+1
2024-06-26
target/riscv: Add multi extension implied rules
Frank Chang
1
-0
/
+340
2024-06-26
target/riscv: Add MISA extension implied rules
Frank Chang
1
-1
/
+49
2024-06-26
target/riscv: Introduce extension implied rules definition
Frank Chang
1
-0
/
+8
2024-06-26
target/riscv: Support the version for ss1p13
Fea.Wang
1
-1
/
+5
2024-06-26
target/riscv: Reuse the conversion function of priv_spec
Jim Shu
1
-1
/
+1
2024-06-04
Merge tag 'hw-misc-accel-20240604' of https://github.com/philmd/qemu into sta...
Richard Henderson
1
-2
/
+8
2024-06-04
target/riscv: Restrict 'rv128' machine to TCG accelerator
Philippe Mathieu-Daudé
1
-2
/
+8
2024-06-03
target/riscv: Remove experimental prefix from "B" extension
Rob Bradford
1
-1
/
+1
2024-06-03
riscv: thead: Add th.sxstatus CSR emulation
Christoph Müllner
1
-0
/
+1
2024-06-03
target/riscv: Implement dynamic establishment of custom decoder
Huang Tao
1
-0
/
+1
2024-06-03
target/riscv/cpu.c: fix Zvkb extension config
Yangyu Chen
1
-1
/
+1
2024-06-03
target/riscv: Add support for Zve64x extension
Jason Chien
1
-0
/
+2
2024-06-03
target/riscv: Add support for Zve32x extension
Jason Chien
1
-0
/
+2
2024-04-25
hw, target: Add ResetType argument to hold and exit phase methods
Peter Maydell
1
-2
/
+2
2024-03-22
target/riscv: do not enable all named features by default
Daniel Henrique Barboza
1
-31
/
+9
2024-03-12
target: Replace CPU_GET_CLASS(cpu -> obj) in cpu_reset_hold() handler
Philippe Mathieu-Daudé
1
-1
/
+1
2024-03-08
target/riscv: move ratified/frozen exts to non-experimental
Daniel Henrique Barboza
1
-13
/
+9
2024-03-08
RISC-V: Add support for Ztso
Palmer Dabbelt
1
-0
/
+2
2024-03-08
target/riscv: Promote svade to a normal extension
Andrew Jones
1
-7
/
+2
2024-03-08
target/riscv: Gate hardware A/D PTE bit updating
Andrew Jones
1
-1
/
+2
2024-03-08
target/riscv: Reset henvcfg to zero
Andrew Jones
1
-2
/
+1
2024-03-08
target/riscv: add remaining named features
Daniel Henrique Barboza
1
-7
/
+35
2024-03-08
target/riscv: add riscv,isa to named features
Daniel Henrique Barboza
1
-4
/
+13
2024-02-28
hw/core/cpu: Remove gdb_get_dynamic_xml member
Akihiko Odaki
1
-14
/
+0
2024-02-28
gdbstub: Infer number of core registers from XML
Akihiko Odaki
1
-1
/
+0
2024-02-28
target/riscv: Use GDBFeature for dynamic XML
Akihiko Odaki
1
-2
/
+2
2024-02-09
target/riscv: add rv32i, rv32e and rv64e CPUs
Daniel Henrique Barboza
1
-0
/
+21
2024-02-09
target/riscv/cpu.c: add riscv_bare_cpu_init()
Daniel Henrique Barboza
1
-16
/
+29
2024-02-09
target/riscv: support new isa extension detection devicetree properties
Conor Dooley
1
-0
/
+54
2024-02-09
target/riscv: use misa_mxl_max to populate isa string rather than TARGET_LONG...
Conor Dooley
1
-1
/
+9
2024-02-09
target/riscv: Expose Zaamo and Zalrsc extensions
Rob Bradford
1
-0
/
+5
2024-02-09
target/riscv: Validate misa_mxl_max only once
Akihiko Odaki
1
-0
/
+21
2024-02-09
target/riscv: Move misa_mxl_max to class
Akihiko Odaki
1
-76
/
+84
2024-02-09
target/riscv/cpu.c: remove cpu->cfg.vlen
Daniel Henrique Barboza
1
-5
/
+3
2024-02-09
target/riscv: add 'vlenb' field in cpu->cfg
Daniel Henrique Barboza
1
-1
/
+3
2024-02-09
target/riscv/cpu.c: move 'marchid' to riscv_cpu_properties[]
Daniel Henrique Barboza
1
-53
/
+57
2024-02-09
target/riscv/cpu.c: move 'mimpid' to riscv_cpu_properties[]
Daniel Henrique Barboza
1
-32
/
+36
2024-02-09
target/riscv/cpu.c: move 'mvendorid' to riscv_cpu_properties[]
Daniel Henrique Barboza
1
-32
/
+37
2024-02-09
target/riscv: remove riscv_cpu_options[]
Daniel Henrique Barboza
1
-5
/
+0
2024-02-09
target/riscv: move 'cboz_blocksize' to riscv_cpu_properties[]
Daniel Henrique Barboza
1
-1
/
+37
2024-02-09
target/riscv: move 'cbop_blocksize' to riscv_cpu_properties[]
Daniel Henrique Barboza
1
-1
/
+37
2024-02-09
target/riscv: move 'cbom_blocksize' to riscv_cpu_properties[]
Daniel Henrique Barboza
1
-1
/
+38
2024-02-09
target/riscv: create finalize_features() for KVM
Daniel Henrique Barboza
1
-5
/
+11
[next]