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AgeCommit message (Expand)AuthorFilesLines
3 hours[TableGen][NFC] Use templated std::clamp (#179400)Sam Elliott2-3/+3
7 hoursReapply "[SelectionDAGISel] Separate the operand numbers in OPC_EmitNode/Morp...Craig Topper3-5/+16
7 hoursRevert "[SelectionDAGISel] Separate the operand numbers in OPC_EmitNode/Morph...Craig Topper3-16/+5
8 hours[NFC][TableGen] Adopt IfDefEmitter in TargetLibraryInfoEmitter (#179388)Rahul Joshi1-7/+7
8 hours[NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (#179017)Rahul Joshi2-5/+5
8 hours[SelectionDAGISel] Separate the operand numbers in OPC_EmitNode/MorphNodeTo i...Craig Topper3-5/+16
10 hours[NFC][TableGen] Adopt CodeGenHelpers in IntrinsicEmitter (#179310)Rahul Joshi1-9/+10
5 days[SelectionDAGISel][TableGen] Remove trailing 0 from isel table. NFC (#178744)Craig Topper1-2/+1
8 days[TableGen][AsmMatcher] Fix optional operand mask indexing when HasMnemonicFir...woruyu1-0/+64
8 days[AMDGPU] Update patterns for v_cvt_flr and v_cvt_rpi (#177962)Mirko Brkušanin2-1/+5
10 daysTableGen: Emit subtarget generated methods as final (#177781)Matt Arsenault2-2/+2
11 days[TableGen] Allow targets to enforce regunits assignment as intervals (#175823)Ryan Mitchell2-0/+108
12 days[NFC][MI] Tidy Up RegState enum use (2/2) (#177090)Sam Elliott18-44/+44
13 days[TableGen] Gracefully error out in ParseTreePattern when DAG has zero operand...Prerona Chaudhuri1-0/+51
14 daysRevert "[TableGen] Emit constexpr versions of some directive/clause f… (#17...Krzysztof Parzyszek2-112/+50
2026-01-20[TableGen] Emit constexpr versions of some directive/clause functions (#176253)Krzysztof Parzyszek2-50/+112
2026-01-16[ValueTypes] Add types for v256bf16 and v512bf16 (#176287)Jim Lin1-2/+2
2026-01-15[SelectionDAG] Move HwMode expansion from tablegen to SelectionISel. (#174471)Craig Topper1-47/+5
2026-01-09[TableGen] Print MVT name in the isel table when it doesn't require a VBR. NF...Craig Topper3-8/+8
2026-01-09[TableGen] Change emitted comments for OPC_Scope to be more like OPC_SwitchTy...Craig Topper3-7/+7
2026-01-09[TableGen] Remove deprecated !getop and !setop (#175155)Jay Foad1-5/+2
2026-01-08[TableGen] Support RegClassByHwMode in CompressPatAlexander Richardson2-0/+331
2026-01-06[NFCI][CodeGen] Add more value types (#174533)Shilei Tian1-2/+2
2026-01-05[TableGen] Return unknown type for RegClassByHwMode when NotRegister is set i...Craig Topper1-0/+1
2026-01-05[TableGen] Fix what looks like a mistake in RegClassByHwMode.td test. NFC (#1...Craig Topper1-34/+98
2025-12-31[SelectionDAG] Remove OPC_EmitStringInteger from isel. (#173936)Craig Topper2-3/+3
2025-12-30[SelectionDAG] Use SLEB128 for signed integers in isel table instead of 'sign...Craig Topper3-5/+5
2025-12-30Revert "[SelectionDAG] Use SLEB128 for signed integers in isel table instead ...Craig Topper3-7/+7
2025-12-30[SelectionDAG] Use SLEB128 for signed integers in isel table instead of 'sign...Craig Topper3-7/+7
2025-12-30[SelectionDAG] Use uint8_t instead of unsigned char for isel MatcherTable. (#...Craig Topper1-1/+1
2025-12-29[TableGen] Tweak whitespace printing in DAGISelMatcherEmitter to avoid traili...Craig Topper1-1/+1
2025-12-29[SelectionDAG] Rename OPC_EmitInteger8->OPC_EmitIntegerI8. NFC (#173832)Craig Topper3-8/+8
2025-12-18[LLVM][MC] Unique per-hw mode field encoding code in CodeEmitterGen (#172764)Rahul Joshi2-27/+12
2025-12-16[TableGen][SchedModel] Add logical combiners for SchedPredicates (#172106)Min-Yih Hsu1-2/+38
2025-12-11[TableGen] Improve generated comments for RegClassByHwMode tablesAlexander Richardson1-24/+24
2025-12-10[TableGen] Replace reachable assertion with error in *ByHwModeAlexander Richardson1-0/+21
2025-12-10[TableGen] Handle RegClassByHwMode in AsmWriterAlexander Richardson1-0/+48
2025-12-10[TableGen] Improve error message for bad VTByHwMode in RegisterByHwModeAlexander Richardson1-0/+33
2025-12-10[MC] Reorder TARGETInstrTable to shrink MCInstrDesc::ImplicitOffset (#171199)Jay Foad2-7/+7
2025-12-08[TableGen] Slightly improve error location for a fatal errorAlexander Richardson3-57/+139
2025-12-07[X86][APX] Compress setzucc with memory operand to setcc (#170842)Feng Zou1-0/+1
2025-12-03[CodeGen] Add MO_LaneMask type and a new COPY_LANEMASK instruction (#151944)Vikash Gupta1-1/+1
2025-11-26CodeGen: Make target overrides of PointerLikeRegClass mandatory (#159882)Matt Arsenault7-9/+49
2025-11-25[DAG][X86] Improve custom i256/i512 AVX512 CTLZ/CTTZ Handling with MVT::i256/...Simon Pilgrim1-2/+2
2025-11-24[TableGen] Change a reachable assert to a fatal errorAlexander Richardson1-0/+30
2025-11-21[OpenMP] Introduce "loop sequence" as directive association (#168934)Krzysztof Parzyszek2-4/+6
2025-11-19[Analysis] Move TargetLibraryInfo data to TableGen (#165009)Kai Nacke1-0/+115
2025-11-19[AArch64][GlobalISel] Added support for hadd family of intrinsics (#163985)Joshua Rodriguez3-4/+4
2025-11-19TableGen: Support target specialized pseudoinstructions (#159880)Matt Arsenault1-0/+101
2025-11-18Extend MemoryEffects to Support Target-Specific Memory Locations (#148650)CarolineConcatto1-0/+78
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