aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp
AgeCommit message (Expand)AuthorFilesLines
2014-12-29[Hexagon] Adding post-increment register form stores and register-immediate f...Colin LeMahieu1-4/+4
2014-12-23[Hexagon] Reapplying 224775 load words.Colin LeMahieu1-4/+4
2014-12-23Reverting 224775 until mayLoad flag is addressed.Colin LeMahieu1-4/+4
2014-12-23[Hexagon] Adding word loads.Colin LeMahieu1-4/+4
2014-12-09[Hexagon] Updating predicate register transfers and adding tstbit to allow se...Colin LeMahieu1-6/+6
2014-11-18[Hexagon] Converting from ADD_rr to A2_add which has encoding bits.Colin LeMahieu1-2/+2
2014-08-04Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher1-5/+9
2014-04-29[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final...Craig Topper1-2/+2
2014-04-25[C++] Use 'nullptr'. Target edition.Craig Topper1-1/+1
2013-05-06Print IR from Hexagon MI passes with -print-before/after-all.Krzysztof Parzyszek1-1/+21
2013-05-06Make references to HexagonTargetMachine "const".Krzysztof Parzyszek1-3/+4
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth1-5/+6
2012-05-03Support for target dependent Hexagon VLIW packetizer.Sirish Pande1-7/+9
2012-04-23Revert r155365, r155366, and r155367. All three of these have regressionChandler Carruth1-7/+7
2012-04-23Hexagon V5 (floating point) support.Sirish Pande1-7/+7
2012-04-18This reverts a long string of commits to the Hexagon backend. TheseChandler Carruth1-7/+7
2012-04-16Hexagon V5 (Floating Point) Support.Sirish Pande1-7/+7
2012-02-18Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu1-2/+2
2012-02-06Hexagon: Remove forbidden iostream includes (it introduces static initializers)Benjamin Kramer1-14/+8
2011-12-27Clean up some Release build warnings.Benjamin Kramer1-3/+2
2011-12-12Hexagon backend supportTony Linthicum1-0/+184
generated by cgit v1.1 at 2025-10-16 07:30:33 +0000