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| author | Benjamin Kramer <benny.kra@googlemail.com> | 2011-12-27 11:41:05 +0000 |
|---|---|---|
| committer | Benjamin Kramer <benny.kra@googlemail.com> | 2011-12-27 11:41:05 +0000 |
| commit | b668401b2ea08a1f476b68b2b30aeb7b9d25f1ce (patch) | |
| tree | 5ee84c92673641ca5159968ca701e47cd8fb586c /llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp | |
| parent | c2c47f90a00026a8c518995aec28e9c744d9cfd1 (diff) | |
| download | llvm-b668401b2ea08a1f476b68b2b30aeb7b9d25f1ce.zip llvm-b668401b2ea08a1f476b68b2b30aeb7b9d25f1ce.tar.gz llvm-b668401b2ea08a1f476b68b2b30aeb7b9d25f1ce.tar.bz2 | |
Clean up some Release build warnings.
llvm-svn: 147289
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp b/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp index cb73ae0..965d482 100644 --- a/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp +++ b/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp @@ -70,7 +70,6 @@ char HexagonExpandPredSpillCode::ID = 0; bool HexagonExpandPredSpillCode::runOnMachineFunction(MachineFunction &Fn) { const HexagonInstrInfo *TII = QTM.getInstrInfo(); - const HexagonRegisterInfo *RegInfo = QTM.getRegisterInfo(); // Loop over all of the basic blocks. for (MachineFunction::iterator MBBb = Fn.begin(), MBBe = Fn.end(); @@ -84,7 +83,7 @@ bool HexagonExpandPredSpillCode::runOnMachineFunction(MachineFunction &Fn) { if (Opc == Hexagon::STriw_pred) { // STriw_pred [R30], ofst, SrcReg; unsigned FP = MI->getOperand(0).getReg(); - assert(FP == RegInfo->getFrameRegister() && + assert(FP == QTM.getRegisterInfo()->getFrameRegister() && "Not a Frame Pointer, Nor a Spill Slot"); assert(MI->getOperand(1).isImm() && "Not an offset"); int Offset = MI->getOperand(1).getImm(); @@ -129,7 +128,7 @@ bool HexagonExpandPredSpillCode::runOnMachineFunction(MachineFunction &Fn) { assert(Hexagon::PredRegsRegClass.contains(DstReg) && "Not a predicate register"); unsigned FP = MI->getOperand(1).getReg(); - assert(FP == RegInfo->getFrameRegister() && + assert(FP == QTM.getRegisterInfo()->getFrameRegister() && "Not a Frame Pointer, Nor a Spill Slot"); assert(MI->getOperand(2).isImm() && "Not an offset"); int Offset = MI->getOperand(2).getImm(); |