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path: root/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
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2025-09-12CodeGen: Remove MachineFunction argument from getRegClass (#158188)Matt Arsenault1-3/+2
This is a low level utility to parse the MCInstrInfo and should not depend on the state of the function.
2025-05-22[LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties ↵users/pcc/spr/main.elf-add-branch-to-branch-optimizationRahul Joshi1-2/+1
(#140002) Add per-property has<Prop>/set<Prop>/reset<Prop> functions to MachineFunctionProperties.
2025-04-19[llvm] Use llvm::SmallVector::pop_back_val (NFC) (#136441)Kazu Hirata1-2/+1
2025-03-02[TwoAddressInstructionPass] Use Register. NFCCraig Topper1-5/+5
2025-02-03TwoAddressInstruction: Fix assert on undef operand with ↵Matt Arsenault1-0/+3
-early-live-intervals (#125518)
2024-07-26[CodeGen] Remove AA parameter of isSafeToMove (#100691)Pengcheng Wang1-2/+2
This `AA` parameter is not used and for most uses they just pass a nullptr. The use of `AA` was removed since 8d0383e.
2024-07-23[LLVM] Fix typo "depedent"Jay Foad1-1/+1
2024-07-15[CodeGen] Port `two-address-instructions` to new pass manager (#98632)paperchalice1-70/+120
Add `TwoAddressInstructionPass`.
2024-07-10[CodeGen][NewPM] Port `LiveIntervals` to new pass manager (#98118)paperchalice1-2/+3
- Add `LiveIntervalsAnalysis`. - Add `LiveIntervalsPrinterPass`. - Use `LiveIntervalsWrapperPass` in legacy pass manager. - Use `std::unique_ptr` instead of raw pointer for `LICalc`, so destructor and default move constructor can handle it correctly. This would be the last analysis required by `PHIElimination`.
2024-07-09[CodeGen][NewPM] Port `SlotIndexes` to new pass manager (#97941)paperchalice1-1/+1
- Add `SlotIndexesAnalysis`. - Add `SlotIndexesPrinterPass`. - Use `SlotIndexesWrapperPass` in legacy pass.
2024-07-09[CodeGen][NewPM] Port `LiveVariables` to new pass manager (#97880)paperchalice1-3/+4
- Port `LiveVariables` to new pass manager. - Convert to `LiveVariablesWrapperPass` in legacy pass manager.
2024-04-24[CodeGen] Make the parameter TRI required in some functions. (#85968)Xu Zhang1-7/+12
Fixes #82659 There are some functions, such as `findRegisterDefOperandIdx` and `findRegisterDefOperand`, that have too many default parameters. As a result, we have encountered some issues due to the lack of TRI parameters, as shown in issue #82411. Following @RKSimon 's suggestion, this patch refactors 9 functions, including `{reads, kills, defines, modifies}Register`, `registerDefIsDead`, and `findRegister{UseOperandIdx, UseOperand, DefOperandIdx, DefOperand}`, adjusting the order of the TRI parameter and making it required. In addition, all the places that call these functions have also been updated correctly to ensure no additional impact. After this, the caller of these functions should explicitly know whether to pass the `TargetRegisterInfo` or just a `nullptr`.
2024-02-07[TwoAddressInstruction] Propagate undef flags for partial defs (#79286)Carl Ritson1-6/+26
If part of a register (lowered from REG_SEQUENCE) is undefined then we should propagate undef flags to uses of those lanes. This is only performed when live intervals are present as it requires live intervals to correctly match uses to defs, and the primary goal is to allow precise computation of subrange intervals.
2024-01-12[TwoAddressInstruction] Recompute live intervals for partial defs (#74431)Carl Ritson1-2/+11
Force live interval recomputation for a register if its definition is narrowed to become partial. The live interval repair process cannot otherwise detect these changes.
2023-12-24[CodeGen] Use range-based for loops (NFC)Kazu Hirata1-2/+1
2023-10-24[ADT] Rename llvm::erase_value to llvm::erase (NFC) (#70156)Kazu Hirata1-1/+1
C++20 comes with std::erase to erase a value from std::vector. This patch renames llvm::erase_value to llvm::erase for consistency with C++20. We could make llvm::erase more similar to std::erase by having it return the number of elements removed, but I'm not doing that for now because nobody seems to care about that in our code base. Since there are only 50 occurrences of erase_value in our code base, this patch replaces all of them with llvm::erase and deprecates llvm::erase_value.
2023-10-19[TwoAddressInstruction] Handle physical registers with LiveIntervals (#66784)Jay Foad1-16/+27
Teach the LiveIntervals path in isPlainlyKilled to handle physical registers, to get equivalent functionality with the LiveVariables path. Test this by adding -early-live-intervals RUN lines to a handful of tests that would fail without this.
2023-09-19[TwoAddressInstruction] Use isPlainlyKilled in processTiedPairs (#65976)Jay Foad1-2/+2
Calling isPlainlyKilled instead of directly checking for a kill flag should make processTiedPairs behave the same with LiveIntervals (i.e. when compiling with -early-live-intervals) as it does with LiveVariables.
2023-09-18[TwoAddressInstruction] Update LiveIntervals after INSERT_SUBREG with undef ↵Jay Foad1-4/+8
read (#66211) Update LiveIntervals after rewriting: %reg = INSERT_SUBREG undef %reg, %subreg, subidx to: undef %reg:subidx = COPY %subreg D113044 implemented this for the non-undef case.
2023-09-14[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes ↵Arthur Eubanks1-4/+4
(#66295) This will make it easy for callers to see issues with and fix up calls to createTargetMachine after a future change to the params of TargetMachine. This matches other nearby enums. For downstream users, this should be a fairly straightforward replacement, e.g. s/CodeGenOpt::Aggressive/CodeGenOptLevel::Aggressive or s/CGFT_/CodeGenFileType::
2023-09-10[TwoAddressInstruction] Use member functions instead of static helpersJay Foad1-57/+76
This just avoids explicitly passing around common pointers like MRI and TII. NFC.
2023-06-16[MC] Add MCRegisterInfo::regunits for iteration over register unitsSergei Barannikov1-2/+2
Reviewed By: foad Differential Revision: https://reviews.llvm.org/D152098
2023-06-01[CodeGen] Make use of MachineInstr::all_defs and all_uses. NFCI.Jay Foad1-4/+4
Differential Revision: https://reviews.llvm.org/D151424
2023-04-20Fix uninitialized class membersAkshay Khadse1-1/+1
Reviewed By: LuoYuanke Differential Revision: https://reviews.llvm.org/D148692
2023-04-17Fix uninitialized pointer members in CodeGenAkshay Khadse1-9/+9
This change initializes the members TSI, LI, DT, PSI, and ORE pointer feilds of the SelectOptimize class to nullptr. Reviewed By: LuoYuanke Differential Revision: https://reviews.llvm.org/D148303
2023-03-30[TwoAddressInstruction] Improve tests for register killed by instructionJay Foad1-10/+11
Define and use a MachineOperand overload of isPlainlyKilled. This improves codegen in a couple of tests because it catches the case where MO does not kill Reg but another operand of the same instruction does. Differential Revision: https://reviews.llvm.org/D147167
2023-02-07[CodeGen] Define and use MachineOperand::getOperandNoJay Foad1-5/+3
This is a helper function to very slightly simplify many calls to MachineInstruction::getOperandNo. Differential Revision: https://reviews.llvm.org/D143250
2022-12-26[TwoAddressInstruction] Constrain RegClass when processing a statepointDanila Malyutin1-0/+7
This transformation could've triggered a verifier assert if RegA and RegB were of different reg classes. Fix this by constraining as the comment for replaceRegWith suggests. Differential Revision: https://reviews.llvm.org/D140672
2022-10-21[TwoAddressInstruction] Fix stale LiveVariables info in processStatepointJay Foad1-0/+1
D129213 improves verification of LiveVariables, and caused CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll to fail with: *** Bad machine code: LiveVariables: Block should not be in AliveBlocks *** after Two-Address instruction pass. Fix it by clearing AliveBlocks for a register which is no longer used. Differential Revision: https://reviews.llvm.org/D136445
2022-09-22MachineVerifier: Verify REG_SEQUENCEMatt Arsenault1-5/+0
Somehow there was no verification of this, other than an ad-hoc assertion in TwoAddressInstructions.
2022-08-23[TwoAddressInstruction] Handle pointer compare sunk past statepoint.Denis Antrushin1-2/+32
CodeGenPrepare pass can sink pointer comparison across statepoint to the point of use (see comment in IR/SafepointIRVerifier.cpp) Due to specifics of statepoints, it is still legal to have tied def and use rewritten to the same register in TwoAddress pass. However, properly updating LiveIntervals and LiveVariables becomes complicated. For simplicity, let's fall back to generic handling of tied registers when we detect such case. TODO: This fixes functional (assertion) failure. Ideally we should try to recompute new live range/liveness in place. Reviewed By: skatkov Differential Revision: https://reviews.llvm.org/D132255
2022-07-20[llvm] Use llvm::any_of and llvm::none_of (NFC)Kazu Hirata1-3/+3
2022-06-01[TwoAddressInstructionPass] Relax assert in statepoint processing.Denis Antrushin1-5/+10
D124631 added special processing for STATEPOINT instructions. It appears that assertion added there is too strong. We can get two tied operands with the same register tied to different defs. If we hit such case, do not process it in statepoint-specific code and delegate it to common case.
2022-05-30[TwoAddressInstructionPass] Special processing of STATEPOINT instruction.Denis Antrushin1-0/+59
STATEPOINT is a special pseudo instruction which represent Moving GC semantic to LLVM. Every tied def/use VReg pair in STATEPOINT represent same physical register which can 'magically' change during call wrapped by statepoint. (By construction, tied use operand is not live across STATEPOINT). This means that when converting into two-address form, there is not need to insert COPY instruction before stateppoint, what TwoAddressInstruction pass does for 'regular' instructions. Reviewed By: MatzeB Differential Revision: https://reviews.llvm.org/D124631
2022-03-16[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated ↵Shengchen Kan1-3/+3
comments
2022-03-16Cleanup codegen includesserge-sans-paille1-2/+0
This is a (fixed) recommit of https://reviews.llvm.org/D121169 after: 1061034926 before: 1063332844 Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup Differential Revision: https://reviews.llvm.org/D121681
2022-03-10Revert "Cleanup codegen includes"Nico Weber1-0/+2
This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20. Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang, and many LLVM tests, see comments on https://reviews.llvm.org/D121169
2022-03-10Cleanup codegen includesserge-sans-paille1-2/+0
after: 1061034926 before: 1063332844 Differential Revision: https://reviews.llvm.org/D121169
2021-11-29[TwoAddressInstructionPass] Create register mapping for registers with ↵Guozhi Wei1-11/+17
multiple uses in the current MBB Currently we create register mappings for registers used only once in current MBB. For registers with multiple uses, when all the uses are in the current MBB, we can also create mappings for them similarly according to the last use. For example %reg101 = ... = ... reg101 %reg103 = ADD %reg101, %reg102 We can create mapping between %reg101 and %reg103. Differential Revision: https://reviews.llvm.org/D113193
2021-11-25[llvm] Use range-based for loops (NFC)Kazu Hirata1-4/+2
2021-11-24[LLVM][NFC]Inclusive language: remove occurances of sanity check/test from llvmZarko Todorovski1-1/+0
Part of work to use more inclusive language in clang/llvm. Rewording some comments and change function and variable names.
2021-11-17[CodeGen] Update LiveIntervals in TargetInstrInfo::convertToThreeAddressJay Foad1-21/+1
Delegate updating of LiveIntervals to each target's convertToThreeAddress implementation, instead of repairing LiveIntervals after the fact in TwoAddressInstruction::convertInstTo3Addr. Differential Revision: https://reviews.llvm.org/D113493
2021-11-11[TwoAddressInstruction] Update LiveIntervals after rewriting INSERT_SUBREG ↵Jay Foad1-0/+28
to COPY Also add subranges to an existing live interval when introducing a new subreg def. Differential Revision: https://reviews.llvm.org/D113044
2021-11-11[LiveIntervals] Update subranges in processTiedPairsJay Foad1-25/+33
In TwoAddressInstructionPass::processTiedPairs when updating live intervals after moving the last use of RegB back to the newly inserted copy, update any affected subranges as well as the main range. Differential Revision: https://reviews.llvm.org/D110411
2021-11-09[CodeGen] Fix assertion failure in ↵Jay Foad1-3/+4
TwoAddressInstructionPass::rescheduleMIBelowKill This fixes an assertion failure with -early-live-intervals when trying to update the live intervals for a debug instruction, which don't even have slot indexes. Differential Revision: https://reviews.llvm.org/D113116
2021-11-05[TwoAddressInstructionPass] Update existing physreg live intervalsJay Foad1-4/+12
In TwoAddressInstructionPass::processTiedPairs with -early-live-intervals, update any preexisting physreg live intervals, as well as virtreg live intervals. By default (without -precompute-phys-liveness) physreg live intervals only exist for registers that are live-in to some basic block. Differential Revision: https://reviews.llvm.org/D113191
2021-11-05Revert "[TwoAddressInstructionPass] Update existing physreg live intervals"Jay Foad1-12/+4
This reverts commit ec0e1e88d24fadb2cb22f431d66b22ee1b01cd43. It was pushed by mistake.
2021-11-05[TwoAddressInstructionPass] Update existing physreg live intervalsJay Foad1-4/+12
In TwoAddressInstructionPass::processTiedPairs with -early-live-intervals, update any preexisting physreg live intervals, as well as virtreg live intervals. By default (without -precompute-phys-liveness) physreg live intervals only exist for registers that are live-in to some basic block. Differential Revision: https://reviews.llvm.org/D113191
2021-10-28[TwoAddressInstructionPass] Put all new instructions into DistanceMapGuozhi Wei1-5/+13
In function convertInstTo3Addr, after converting a two address instruction into three address instruction, only the last new instruction is inserted into DistanceMap. This is wrong, DistanceMap should track all instructions from the beginning of current MBB to the working instruction. When a two address instruction is converted to three address instruction, multiple instructions may be generated (usually an extra COPY is generated), all of them should be inserted into DistanceMap. Similarly when unfolding memory operand in function tryInstructionTransform DistanceMap is not maintained correctly. Differential Revision: https://reviews.llvm.org/D111857
2021-10-12[TwoAddressInstruction] Remove ad hoc machine verificationJay Foad1-3/+0
With the -early-live-intervals command line flag, TwoAddressInstructionPass::runOnMachineFunction would call MachineFunction::verify before returning to check the live intervals. But there was not much benefit to doing this since -verify-machineinstrs and LLVM_ENABLE_EXPENSIVE_CHECKS provide a more general way of scheduling machine verification after every pass. Also it caused problems on targets like Lanai which are marked as "not machine verifier clean", since verification would fail for known target-specific problems which are nothing to do with LiveIntervals. Differential Revision: https://reviews.llvm.org/D111618
generated by cgit v1.1 at 2025-09-29 11:27:37 +0000