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path: root/llvm/lib/CodeGen/TargetInstrInfo.cpp
AgeCommit message (Expand)AuthorFilesLines
6 days[CodeGen] Rename isReallyTriviallyReMaterializable [nfc]Philip Reames1-1/+1
10 daysCodeGen: Add RegisterClass by HwMode (#158269)Matt Arsenault1-2/+5
2025-09-12CodeGen: Remove MachineFunction argument from getRegClass (#158188)Matt Arsenault1-3/+2
2025-09-12CodeGen: Remove MachineFunction argument from getPointerRegClass (#158185)Matt Arsenault1-1/+1
2025-09-05[TargetInstrInfo][AArch64] Don't assume register came from operand 0 in canCo...Craig Topper1-1/+1
2025-08-31[CodeGen] Drop disjoint flag when reassociating (#156218)Philip Reames1-0/+2
2025-08-04[CodeGen] Remove an unnecessary cast (NFC) (#151901)Kazu Hirata1-1/+1
2025-07-31MachineInstrBuilder: Introduce copyMIMetadata() function.Peter Collingbourne1-1/+1
2025-07-17[TII] Do not fold undef copies (#147392)Jeffrey Byrnes1-5/+11
2025-07-11[CodeGen] Do not use subsituteRegister to update implicit def (#148068)Peiming Liu1-8/+21
2025-07-10[CodeGen] commuteInstruction should update implicit-def (#131361)Sander de Smalen1-1/+8
2025-05-22[LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties (#140...users/pcc/spr/main.elf-add-branch-to-branch-optimizationRahul Joshi1-2/+1
2025-04-27[llvm] Use range constructors of *Set (NFC) (#137552)Kazu Hirata1-1/+1
2025-04-18[Analysis] Remove implicit LocationSize conversion from uint64_t (#133342)Philip Reames1-1/+1
2025-03-26[CodeGen] Provide a target independent default for optimizeLoadInst [NFC]Philip Reames1-0/+41
2025-03-25[Machine-Combiner] Add a pass to reassociate chains of accumulation instructi...Jonathan Cohen1-11/+259
2025-03-23Revert "[AArch64][MachineCombiner] Recombine long chains of accumulation inst...Jonathan Cohen1-262/+11
2025-03-23[AArch64][MachineCombiner] Recombine long chains of accumulation instructions...Jonathan Cohen1-11/+262
2025-03-13[MachineCombiner][Targets] Use Register in TII genAlternativeCodeSequence int...Craig Topper1-2/+2
2025-01-13[aarch64][win] Update Called Globals info when updating Call Site info (#122762)Daniel Paoliello1-3/+3
2025-01-11[AMDGPU] Add target hook to isGlobalMemoryObject (#112781)Austin Kerbow1-0/+5
2024-08-27[TII][RISCV] Add renamable bit to copyPhysReg (#91179)Piyou Chen1-1/+3
2024-07-24MachineOutliner: Use PM to query MachineModuleInfo (#99688)Matt Arsenault1-4/+6
2024-07-01[llvm][CodeGen] Avoid 'raw_string_ostream::str' (NFC) (#97318)Youngsuk Kim1-2/+2
2024-04-23[CodeGen][TII] Allow reassociation on custom operand indices (#88306)Min-Yih Hsu1-43/+100
2024-04-11[clang][llvm] Remove "implicit-section-name" attribute (#87906)Arthur Eubanks1-2/+1
2024-04-11[MachineCombiner][NFC] Split target-dependent patternsPengcheng Wang1-8/+11
2024-03-17[CodeGen] Use LocationSize for MMO getSize (#84751)David Green1-1/+2
2024-03-06[Codegen] Make Width in getMemOperandsWithOffsetWidth a LocationSize. (#83875)David Green1-1/+1
2023-12-05TargetInstrInfo, TargetSchedule: fix non-NFC parts of 9468de4 (#74338)Ramkumar Ramachandra1-1/+1
2023-12-04[TargetInstrInfo] update INLINEASM memoperands once (#74135)Nick Desaulniers1-22/+21
2023-12-01Fix MSVC signed/unsigned mismatch warning. NFC.Simon Pilgrim1-1/+1
2023-12-01TargetInstrInfo: make getOperandLatency return optional (NFC) (#73769)Ramkumar Ramachandra1-12/+11
2023-11-29[X86InstrInfo] support memfold on spillable inline asm (#70832)Nick Desaulniers1-12/+21
2023-11-22[AArch64] Use the same fast math preservation for MachineCombiner reassociati...Craig Topper1-4/+16
2023-11-21reapply "[TargetInstrInfo] enable foldMemoryOperand for InlineAsm (#70743)" (...Nick Desaulniers1-0/+62
2023-11-19Revert "[TargetInstrInfo] enable foldMemoryOperand for InlineAsm (#70743)"Bill Wendling1-62/+0
2023-11-17[TargetInstrInfo] enable foldMemoryOperand for InlineAsm (#70743)Nick Desaulniers1-0/+62
2023-11-03[InlineAsm] Steal a bit to denote a register is foldable (#70738)Nick Desaulniers1-0/+4
2023-10-27[BasicBlockSections] Apply path cloning with -basic-block-sections. (#68860)Rahman Lavaee1-3/+12
2023-09-13reland [InlineAsm] wrap ConstraintCode in enum class NFC (#66264)Nick Desaulniers1-1/+1
2023-09-13Revert "[InlineAsm] wrap ConstraintCode in enum class NFC (#66003)"Reid Kleckner1-1/+1
2023-09-13[InlineAsm] wrap ConstraintCode in enum class NFC (#66003)Nick Desaulniers1-1/+1
2023-09-11[InlineAsm] refactor InlineAsm class NFC (#65649)Nick Desaulniers1-9/+8
2023-08-31[InlineAsm] wrap Kind in enum class NFCNick Desaulniers1-1/+1
2023-08-24[CodeGen][AArch64] Don't split functions with a red zone on AArch64Daniel Hoekwater1-0/+20
2023-08-19[llvm] Remove redundant control flow statements (NFC)Kazu Hirata1-1/+0
2023-08-07[TII] NFCI: Simplify the interface for isTriviallyReMaterializableSander de Smalen1-1/+1
2023-07-31Reapply "[CodeGen]Allow targets to use target specific COPY instructions for ...Matt Arsenault1-3/+4
2023-07-27[CodeGen] Store call frame size in MachineBasicBlockJay Foad1-0/+16
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