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path: root/llvm/lib/CodeGen/MachineOperand.cpp
AgeCommit message (Expand)AuthorFilesLines
2021-07-22[WebAssembly] Implementation of global.get/set for reftypes in LLVM IRPaulo Matos1-1/+1
2021-07-02Revert "[WebAssembly] Implementation of global.get/set for reftypes in LLVM IR"Roman Lebedev1-1/+1
2021-07-02[WebAssembly] Implementation of global.get/set for reftypes in LLVM IRPaulo Matos1-1/+1
2021-06-30CodeGen: Print/parse LLTs in MachineMemOperandsMatt Arsenault1-3/+3
2021-06-29CodeGen: Store LLT instead of uint64_t in MachineMemOperandMatt Arsenault1-5/+14
2021-06-21Rename MachineMemOperand::getOrdering -> getSuccessOrdering.Eli Friedman1-3/+3
2021-06-14Intrinsic::getName: require a Module argumentJeroen Dobbelaere1-1/+1
2021-06-14Implement DW_CFA_LLVM_* for Heterogeneous DebuggingRamNalamothu1-0/+8
2021-06-10Revert "Implementation of global.get/set for reftypes in LLVM IR"David Spickett1-2/+2
2021-06-10Implementation of global.get/set for reftypes in LLVM IRPaulo Matos1-2/+2
2021-05-07[llvm][NFC] Remove remaining deprecated alignment functions from CodeGenGuillaume Chatelet1-4/+0
2021-03-10[mir] Change 'undef' for MMO base addresses to 'unknown-address'Daniel Sanders1-1/+1
2021-03-04[mir] Fix confusing MIR when MMO's value is nullptr but offset is non-zeroDaniel Sanders1-0/+5
2021-01-11[CodeGen] Try to make the print of memory operand alignment a little more use...Craig Topper1-2/+4
2020-10-08[MCRegister] Simplify isStackSlot & isPhysicalRegister and delete isPhysical....Fangrui Song1-1/+1
2020-09-03[codegen] Ensure target flags are cleared/set properly. NFC.Michael Liao1-4/+9
2020-09-03[MIRVRegNamer] Experimental MachineInstr stable hashing (Fowler-Noll-Vo)Puyan Lotfi1-1/+6
2020-07-20[llc] (almost) remove `--print-machineinstrs`Yuanfang Chen1-1/+1
2020-06-24[MIR] Fix CFI_INSTRUCTION escape printingScott Linder1-1/+1
2020-06-24Loads.h - reduce AliasAnalysis.h include to forward declarations. NFC.Simon Pilgrim1-0/+1
2020-03-30[Alignment][NFC] Provide tightened up functions in SelectionDAG, MachineFunct...Guillaume Chatelet1-1/+1
2020-03-27[Alignment][NFC] MachineMemOperand::getAlign/getBaseAlignGuillaume Chatelet1-8/+11
2020-03-27[Alignment][NFC] Update MachineMemOperand implementation to use MaybeAlignGuillaume Chatelet1-3/+3
2020-01-24[Alignment][NFC] Deprecate Align::None()Guillaume Chatelet1-2/+1
2020-01-17Remove unneeded FoldingSet.h include from Attributes.hReid Kleckner1-0/+1
2020-01-13[GlobalISel] Change representation of shuffle masks in MachineOperand.Eli Friedman1-6/+6
2020-01-10[MIR] Fix cyclic dependency of MIR formatterPeng Guo1-8/+8
2020-01-08Revert "Revert "[MIR] Target specific MIR formating and parsing""Daniel Sanders1-32/+25
2020-01-08Revert "[MIR] Target specific MIR formating and parsing"Nico Weber1-25/+32
2020-01-08[MIR] Target specific MIR formating and parsingPeng Guo1-32/+25
2020-01-08Revert "[MIR] Target specific MIR formating and parsing"Daniel Sanders1-25/+32
2020-01-08[MIR] Target specific MIR formating and parsingPeng Guo1-32/+25
2019-10-21[Alignment][NFC] Finish transition for `Loads`Guillaume Chatelet1-1/+2
2019-10-02[CodeGen] Remove unused MachineMemOperand::print wrappers (PR41772)Simon Pilgrim1-11/+0
2019-09-24MCRegisterInfo: Merge getLLVMRegNum and getLLVMRegNumFromEHPavel Labath1-5/+3
2019-08-15Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders1-1/+1
2019-08-13GlobalISel: Change representation of shuffle masksMatt Arsenault1-0/+18
2019-08-06CodeGen: Migration to using RegisterMatt Arsenault1-6/+6
2019-08-01Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders1-7/+7
2019-07-31SelectionDAG, MI, AArch64: Widen target flags fields/arguments from unsigned ...Peter Collingbourne1-3/+3
2019-06-24CodeGen: Introduce a class for registersMatt Arsenault1-1/+1
2019-06-14Fix not calling TargetCustom PSVs printerMatt Arsenault1-1/+1
2019-06-01[CodeGen] Fix hashing for MO_ExternalSymbol MachineOperands.Eli Friedman1-1/+1
2019-05-15[MachineOperand] Add a ChangeToGA methodNicolai Haehnle1-0/+13
2019-04-12Include what's used in a few cpp files - these were getting transitiveEric Christopher1-0/+1
2019-01-31GlobalISel: Fix creating MMOs with align 0Matt Arsenault1-1/+1
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
2018-12-18[AArch64] - Return address signing dwarf supportLuke Cheeseman1-0/+5
2018-11-23Revert r347490 as it breaks address sanitizer buildsLuke Cheeseman1-5/+0
2018-11-23Revert r343341Luke Cheeseman1-0/+5
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