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author | Guillaume Chatelet <gchatelet@google.com> | 2020-03-27 13:51:59 +0000 |
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committer | Guillaume Chatelet <gchatelet@google.com> | 2020-03-27 15:49:13 +0000 |
commit | 74eac9031afb021dbd2c7702b1e814fe80e3fe64 (patch) | |
tree | 3417cdeb3d97b9c18d4ba9b8d505844660036cdf /llvm/lib/CodeGen/MachineOperand.cpp | |
parent | a515fd01a4f2355291ab424d093e9de4f8acd4dc (diff) | |
download | llvm-74eac9031afb021dbd2c7702b1e814fe80e3fe64.zip llvm-74eac9031afb021dbd2c7702b1e814fe80e3fe64.tar.gz llvm-74eac9031afb021dbd2c7702b1e814fe80e3fe64.tar.bz2 |
[Alignment][NFC] MachineMemOperand::getAlign/getBaseAlign
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: arsenm, dschuff, sdardis, nemanjai, jvesely, nhaehnle, sbc100, jgravelle-google, hiraditya, aheejin, kbarton, jrtc27, atanasyan, jfb, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76925
Diffstat (limited to 'llvm/lib/CodeGen/MachineOperand.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineOperand.cpp | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp index 47d1c68..a202131 100644 --- a/llvm/lib/CodeGen/MachineOperand.cpp +++ b/llvm/lib/CodeGen/MachineOperand.cpp @@ -1014,7 +1014,6 @@ MachineMemOperand::MachineMemOperand(MachinePointerInfo ptrinfo, Flags f, assert((PtrInfo.V.isNull() || PtrInfo.V.is<const PseudoSourceValue *>() || isa<PointerType>(PtrInfo.V.get<const Value *>()->getType())) && "invalid pointer value"); - assert(getBaseAlignment() == a && a != 0 && "Alignment is not a power of 2!"); assert((isLoad() || isStore()) && "Not a load/store!"); AtomicInfo.SSID = static_cast<unsigned>(SSID); @@ -1032,7 +1031,7 @@ void MachineMemOperand::Profile(FoldingSetNodeID &ID) const { ID.AddInteger(Size); ID.AddPointer(getOpaqueValue()); ID.AddInteger(getFlags()); - ID.AddInteger(getBaseAlignment()); + ID.AddInteger(getBaseAlign().value()); } void MachineMemOperand::refineAlignment(const MachineMemOperand *MMO) { @@ -1041,9 +1040,9 @@ void MachineMemOperand::refineAlignment(const MachineMemOperand *MMO) { assert(MMO->getFlags() == getFlags() && "Flags mismatch!"); assert(MMO->getSize() == getSize() && "Size mismatch!"); - if (MMO->getBaseAlignment() >= getBaseAlignment()) { + if (MMO->getBaseAlign() >= getBaseAlign()) { // Update the alignment value. - BaseAlign = Align(MMO->getBaseAlignment()); + BaseAlign = MMO->getBaseAlign(); // Also update the base and offset, because the new alignment may // not be applicable with the old ones. PtrInfo = MMO->PtrInfo; @@ -1052,8 +1051,12 @@ void MachineMemOperand::refineAlignment(const MachineMemOperand *MMO) { /// getAlignment - Return the minimum known alignment in bytes of the /// actual memory reference. -uint64_t MachineMemOperand::getAlignment() const { - return MinAlign(getBaseAlignment(), getOffset()); +uint64_t MachineMemOperand::getAlignment() const { return getAlign().value(); } + +/// getAlign - Return the minimum known alignment in bytes of the +/// actual memory reference. +Align MachineMemOperand::getAlign() const { + return commonAlignment(getBaseAlign(), getOffset()); } void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST, @@ -1148,8 +1151,8 @@ void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST, } } MachineOperand::printOperandOffset(OS, getOffset()); - if (getBaseAlignment() != getSize()) - OS << ", align " << getBaseAlignment(); + if (getBaseAlign() != getSize()) + OS << ", align " << getBaseAlign().value(); auto AAInfo = getAAInfo(); if (AAInfo.TBAA) { OS << ", !tbaa "; |