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authorMatt Arsenault <Matthew.Arsenault@amd.com>2021-05-19 22:06:14 -0400
committerMatt Arsenault <Matthew.Arsenault@amd.com>2021-06-29 17:38:51 -0400
commit990278d026d680942c859be70836ad34a9a716f7 (patch)
treef6bdb4f0a9ad4dcf48dc1cf0d6751f9bd9d8c132 /llvm/lib/CodeGen/MachineOperand.cpp
parent49fa6abf7472022d7bf1fb05df3033a7bd1ff0de (diff)
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CodeGen: Store LLT instead of uint64_t in MachineMemOperand
GlobalISel is relying on regular MachineMemOperands to track all of the memory properties of accesses. Just the raw byte size is insufficent to disambiguate all situations. For example, if we need to split an unaligned extending load, we need to know the number of bits in the original source value and can't infer it from the result type. This is also a problem for extending vector loads. This does decrease the maximum representable size from the full uint64_t bytes to a maximum of 16-bits. No in tree testcases hit this, other than places using UINT64_MAX for unknown sizes. This may be an issue for G_MEMCPY and co., although they can just use unknown size for large static sizes. This also has potential for backend abuse by relying on the type when it really shouldn't be relevant after selection. This does not include the necessary MIR printer/parser changes to represent this.
Diffstat (limited to 'llvm/lib/CodeGen/MachineOperand.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineOperand.cpp19
1 files changed, 14 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp
index 79f59cf..b020c42 100644
--- a/llvm/lib/CodeGen/MachineOperand.cpp
+++ b/llvm/lib/CodeGen/MachineOperand.cpp
@@ -1023,13 +1023,12 @@ MachinePointerInfo MachinePointerInfo::getUnknownStack(MachineFunction &MF) {
}
MachineMemOperand::MachineMemOperand(MachinePointerInfo ptrinfo, Flags f,
- uint64_t s, Align a,
- const AAMDNodes &AAInfo,
+ LLT type, Align a, const AAMDNodes &AAInfo,
const MDNode *Ranges, SyncScope::ID SSID,
AtomicOrdering Ordering,
AtomicOrdering FailureOrdering)
- : PtrInfo(ptrinfo), Size(s), FlagVals(f), BaseAlign(a), AAInfo(AAInfo),
- Ranges(Ranges) {
+ : PtrInfo(ptrinfo), MemoryType(type), FlagVals(f), BaseAlign(a),
+ AAInfo(AAInfo), Ranges(Ranges) {
assert((PtrInfo.V.isNull() || PtrInfo.V.is<const PseudoSourceValue *>() ||
isa<PointerType>(PtrInfo.V.get<const Value *>()->getType())) &&
"invalid pointer value");
@@ -1043,11 +1042,21 @@ MachineMemOperand::MachineMemOperand(MachinePointerInfo ptrinfo, Flags f,
assert(getFailureOrdering() == FailureOrdering && "Value truncated");
}
+MachineMemOperand::MachineMemOperand(MachinePointerInfo ptrinfo, Flags f,
+ uint64_t s, Align a,
+ const AAMDNodes &AAInfo,
+ const MDNode *Ranges, SyncScope::ID SSID,
+ AtomicOrdering Ordering,
+ AtomicOrdering FailureOrdering)
+ : MachineMemOperand(ptrinfo, f,
+ s == ~UINT64_C(0) ? LLT() : LLT::scalar(8 * s), a,
+ AAInfo, Ranges, SSID, Ordering, FailureOrdering) {}
+
/// Profile - Gather unique data for the object.
///
void MachineMemOperand::Profile(FoldingSetNodeID &ID) const {
ID.AddInteger(getOffset());
- ID.AddInteger(Size);
+ ID.AddInteger(getMemoryType().getUniqueRAWLLTData());
ID.AddPointer(getOpaqueValue());
ID.AddInteger(getFlags());
ID.AddInteger(getBaseAlign().value());