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path: root/llvm/lib/CodeGen/MIRParser/MIParser.cpp
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2025-07-30[GISel] Introduce MIFlags::InBounds (#150900)Fabian Ritter1-1/+4
2025-07-29[AMDGPU] Add NoaliasAddrSpace to AAMDnodes (#149247)Shoreshen1-1/+6
2025-05-26[llvm] Value-initialize values with *Map::try_emplace (NFC) (#141522)Kazu Hirata1-2/+2
2025-05-08[KeyInstr] Add MIR parser support (#133494)Orlando Cazalet-Hyams1-1/+25
2025-05-08[CodeGen] Parse nusw flag (#138856)Pierre van Houtryve1-0/+3
2025-03-02[CodeGen] Use Register::id() to avoid implicit cast. NFCCraig Topper1-2/+2
2025-02-10[NFC][LLVM] Remove unused `TargetIntrinsicInfo` class (#126003)Rahul Joshi1-7/+1
2025-02-01[MIParser] Don't use Register to hold Dwarf register numbers. NFC (#125263)Craig Topper1-4/+4
2025-01-20[MIRParser] Avoid repeated map lookups (NFC) (#123561)Kazu Hirata1-2/+3
2024-11-12[CodeGen] Remove unused includes (NFC) (#115996)Kazu Hirata1-1/+0
2024-10-30[GlobalISel] Import samesign flag (#114267)Thorsten Schütt1-1/+4
2024-10-30Revert "[GlobalISel] Import samesign flag" (#114256)Thorsten Schütt1-4/+1
2024-10-30[GlobalISel] Import samesign flag (#113090)Thorsten Schütt1-1/+4
2024-10-28[AArch64][Libunwind] Add Support for FEAT_PAuthLR DWARF Instruction (#112171)Jack Styles1-0/+5
2024-10-14[MIR] Add missing noteNewVirtualRegister callbacks (#111634)Akshat Oke1-0/+1
2024-10-14[MIR] Serialize virtual register flags (#110228)Akshat Oke1-0/+10
2024-09-30[NFC] Move intrinsic related functions to Intrinsic namespace (#110125)Rahul Joshi1-1/+1
2024-09-25Reapply "Deprecate the `-fbasic-block-sections=labels` option." (#110039)Rahman Lavaee1-8/+1
2024-09-25Revert "Deprecate the `-fbasic-block-sections=labels` option. (#107494)"Kazu Hirata1-1/+8
2024-09-25Deprecate the `-fbasic-block-sections=labels` option. (#107494)Rahman Lavaee1-8/+1
2024-09-19[LLVM] Use {} instead of std::nullopt to initialize empty ArrayRef (#109133)Jay Foad1-2/+2
2024-08-25[llvm] Prefer StringRef::substr to StringRef::slice (NFC) (#105943)Kazu Hirata1-2/+2
2024-07-31[MIR] Remove separate Size variable from parseMachineMemoryOperand. NFC (#101...Craig Topper1-6/+5
2024-07-31[RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (#84965)Jiahan Xie1-1/+1
2024-07-10[MIR] Replace bespoke DIExpression parserScott Linder1-42/+8
2024-06-25[LLVM][MIR] Support parsing bfloat immediates in MIR parser (#96010)Stephen Chou1-0/+1
2024-03-26[CodeGen] Add nneg and disjoint flags (#86650)Thorsten Schütt1-1/+7
2024-03-18[GlobalISel] convergence control tokens and intrinsics (#67006)Sameer Sahasrabuddhe1-5/+8
2024-01-31[AsmParser] Support non-consecutive global value numbers (#80013)Nikita Popov1-2/+2
2024-01-25[llvm] Move CodeGenTypes library to its own directory (#79444)Nico Weber1-1/+1
2023-12-04[CodeGen] Split off PseudoSourceValueManager into separate header (NFC) (#73327)Nikita Popov1-0/+1
2023-11-30MachineVerifier: Reject extra non-register operands on instructions (#73758)Matt Arsenault1-12/+3
2023-11-02[CodeGen][MIR] Support parsing of scalable vectors in MIR (#70893)Michael Maitland1-8/+26
2023-10-27[BasicBlockSections] Apply path cloning with -basic-block-sections. (#68860)Rahman Lavaee1-6/+12
2023-08-20[GlobalISel] introduce MIFlag::NoConvergentSameer Sahasrabuddhe1-0/+5
2023-07-27[CodeGen] Store call frame size in MachineBasicBlockJay Foad1-0/+19
2023-07-13Revert "[CodeGen] Store SP adjustment in MachineBasicBlock. NFCI."Oliver Stannard1-19/+0
2023-07-12[CodeGen] Store SP adjustment in MachineBasicBlock. NFCI.Jay Foad1-0/+19
2023-06-26[MC] Add SMLoc to MCCFIInstructionFangrui Song1-1/+1
2023-06-01[SDAG] Preserve unpredictable metadata, teach X86CmovConversion to respect th...Dávid Bolvanský1-1/+4
2023-05-14[Coverity] Fix unchecked return value, NFCPhoebe Wang1-3/+5
2023-05-03Restore CodeGen/LowLevelType from `Support`NAKAMURA Takumi1-1/+1
2023-02-19Use APInt::getSignificantBits instead of APInt::getMinSignedBits (NFC)Kazu Hirata1-2/+2
2023-01-23[MC] Define and use MCInstrDesc implicit_uses and implicit_defs. NFC.Jay Foad1-8/+4
2023-01-20[APSInt] Fix bug in APSInt mentioned in https://github.com/llvm/llvm-project/...Peter Rong1-2/+5
2023-01-17[Propeller] Use Fixed MBB ID instead of volatile MachineBasicBlock::Number.Rahman Lavaee1-0/+25
2023-01-13[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFCCraig Topper1-5/+5
2023-01-06[DebugInfo][NFC] Add new MachineOperand type and change DBG_INSTR_REF syntaxStephen Tozer1-0/+34
2023-01-05Fix typosLuke Drummond1-1/+1
2023-01-04[MC] Consistently use MCInstrDesc::getImplicitUses and getImplicitDefs. NFC.Jay Foad1-2/+2