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AgeCommit message (Expand)AuthorFilesLines
3 days[GlobalISel] Rewrite binop_left_to_zero using MIR Patterns (#177924)Osman Yasar1-7/+0
3 days[AArch64] Use GISel for optnone functions (#174746)Ryan Cowan1-10/+14
3 days[CodeGen] Only use actual alloca alignment (#178361)Jameson Nash1-1/+1
3 days[NFC][CodeGen] Use getAllocationSize instead of manual size computation (#178...Jameson Nash1-2/+1
4 days[perf] Replace copy-assign by move-assign in llvm/lib/CodeGen/* (#178172)serge-sans-paille1-1/+1
6 days[GlobalIsel] Enabling more rules for fp constant folding (#177902)Julian Pokrovsky1-0/+20
10 daysGlobalISel: Fix mishandling vector-as-scalar in return values (#175780)Matt Arsenault1-8/+28
11 days[LLVM][CodeGen] Remove pass initialization calls from pass constructors (#173...Rahul Joshi3-7/+6
11 daysIR: Remove llvm.convert.to.fp16 and llvm.convert.from.fp16 intrinsics (#174484)Matt Arsenault1-12/+0
12 daysCodeGen: Use LibcallLoweringInfo for stack protector insertion (#176829)Matt Arsenault1-4/+5
12 daysGlobalISel: Use LibcallLoweringInfo in IRTranslator for real (#176824)Matt Arsenault1-4/+11
13 daysGlobalISel: Use LibcallLowering to get libcall calling conventions (#176837)Matt Arsenault1-7/+3
13 daysGlobalISel: Use LibcallLoweringInfo more in LegalizerHelper (#176411)Matt Arsenault1-16/+25
13 days[X86][WinEH] Insert nop after unwinding inline assembly (#176393)Nikita Popov1-0/+2
2026-01-17GlobalISel: Use LibcallLoweringInfo more in IRTranslator (#176412)Matt Arsenault1-5/+10
2026-01-16[GISel] Add G_CTLS Opcode and combines, lower to cls(w) (#175069)Stefan Weigl-Bosker3-5/+150
2026-01-16Reland "[NFC][MI] Tidy Up RegState enum use (1/2)" (#176277)Sam Elliott1-3/+3
2026-01-16GlobalISel: Use LibcallLoweringInfo analysis in legalizer (#170328)Matt Arsenault2-120/+120
2026-01-15[CodeGen] Check BlockAddress users before marking block as taken (#174480)Justin Stitt1-2/+8
2026-01-15Revert "[NFC][MI] Tidy Up RegState enum use (1/2)" (#176190)Sam Elliott1-3/+3
2026-01-15[NFC][MI] Tidy Up RegState enum use (1/2) (#176091)Sam Elliott1-3/+3
2026-01-05[LLVM] Temporarily allow implicit truncation in some placesNikita Popov1-1/+3
2026-01-02[LLVM][ADT] Migrate users of `make_scope_exit` to CTAD (#174030)Victor Chernyakin3-4/+4
2026-01-02[AArch64][GlobalISel] Add disjoint to the G_OR when lowering G_ROTR/L (#172317)David Green1-1/+1
2025-12-30[GlobalISel] Implement G_UADDO/G_UADDE/G_SADDO/G_SADDE for computeKnownBits (...Yatao Wang1-1/+31
2025-12-30Revert "[aarch64] Mix the frame pointer with the stack cookie when protecting...Leandro Lupori1-3/+2
2025-12-19[GlobalISel] Fix FCMP constant folding in presence trunc/zext/sext chain (#17...Joel Fuentes1-2/+4
2025-12-17[aarch64] Mix the frame pointer with the stack cookie when protecting the sta...Pan Tao1-2/+3
2025-12-17[GlobalISel] Don't permit G_*MIN/G_*MAX of pointer vectors (#168872)Nathan Corbyn2-3/+3
2025-12-15[GlobalISel](NFC) Refactor construction of LLTs in `LegalizerHelper` (#170664)Nathan Corbyn1-27/+22
2025-12-12Fix misprint in computeKnownFPClass in GISelValueTracking.cpp (#171566)Seraphimt1-2/+3
2025-12-12[GISel][Inlineasm] Support inlineasm i/s constraint for symbols (#170094)KRM71-0/+11
2025-12-08[X86][GlobalISel] Set Dst register correctly when narrowing G_ICMP (#169947)Evgenii Kudriashov1-1/+1
2025-12-04[AMDGPU][GlobalISel] Fix / workaround amdgcn.kill/.unreachable lowering (#170...Robert Imschweiler1-5/+17
2025-12-04[IR] Add CallBr intrinsics support (#133907)Robert Imschweiler1-3/+33
2025-12-02GlobalISel: Stop using TPC to check if GlobalISelAbort is enabled (#169917)Petar Avramovic5-35/+35
2025-12-02Avoid maxnum(sNaN, x) optimizations / folds (#170181)Lewis Crawford1-0/+4
2025-12-02[AArch64][GlobalISel] Don't crash when legalising vector G_SHL (#168848)Nathan Corbyn1-6/+15
2025-12-01[SPIRV] Add legalization for long vectors (#169665)Steven Perron1-0/+20
2025-11-26Add IR and codegen support for deactivation symbols.Peter Collingbourne3-2/+11
2025-11-19[AArch64][GlobalISel] Check unmergeSrc is a vector in matchCombineBuildUnmerg...Ryan Cowan1-0/+3
2025-11-18[GISel] Use getScalarSizeInBits in LegalizerHelper::lowerBitCount (#168584)Craig Topper1-3/+3
2025-11-18[GISel][RISCV] Compute CTPOP of small odd-sized integer correctly (#168559)Hongyu Chen1-0/+4
2025-11-18[AArch64][GISel] Don't crash in known-bits when copying from vectors to non-v...Nathan Corbyn1-2/+9
2025-11-18[AArch64][GlobalISel] Add better basic legalization for llround. (#168427)David Green1-0/+12
2025-11-17[AArch64][GlobalISel] Add combine for build_vector(unmerge, unmerge, undef, u...Ryan Cowan1-1/+83
2025-11-17[DAG] Add strictfp implicit def reg after metadata. (#168282)David Green1-7/+7
2025-11-17[InlineAsmLowering] unsigned -> TypeSize for getTypeStoreSize resultpvanhout1-1/+1
2025-11-14[AArch64][GlobalISel] Improve lowering of vector fp16 fpext (#165554)Ryan Cowan1-0/+8
2025-11-15[GlobalISel] Return byte offsets from computeValueLLTs (NFC) (#166747)Sergei Barannikov1-14/+14