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| author | vangthao95 <vang.thao@amd.com> | 2026-02-11 09:30:11 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2026-02-11 09:30:11 -0800 |
| commit | 90a56a18ee1aa3bdd58f7ddf8ffd28c65e095b82 (patch) | |
| tree | 143c42a1c944253f6a2c955b4c569c20cd6cac87 /llvm/lib | |
| parent | 182eb9d21a7a3cdf24c206d71b15bb847f41ecb3 (diff) | |
| download | llvm-90a56a18ee1aa3bdd58f7ddf8ffd28c65e095b82.tar.gz llvm-90a56a18ee1aa3bdd58f7ddf8ffd28c65e095b82.tar.bz2 llvm-90a56a18ee1aa3bdd58f7ddf8ffd28c65e095b82.zip | |
AMDGPU/GlobalISel: RegBankLegalize for global atomic ordered add (#180829)
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp index 61db779ae0b4..6f4be08beee4 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp @@ -1412,6 +1412,9 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST, .Any({{DivB64}, {{VgprB64}, {IntrId, SgprP1}}}) .Any({{DivB128}, {{VgprB128}, {IntrId, SgprP1}}}); + addRulesForIOpcs({amdgcn_global_atomic_ordered_add_b64}) + .Any({{DivS64}, {{Vgpr64}, {IntrId, VgprP1, Vgpr64}}}); + addRulesForIOpcs({amdgcn_wwm, amdgcn_strict_wwm}, StandardB) .Div(B32, {{VgprB32}, {IntrId, VgprB32}}) .Uni(B32, {{SgprB32}, {IntrId, SgprB32}}) |