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path: root/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
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Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
-rw-r--r--llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp7
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index b6e5838..2121a0e 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -576,6 +576,13 @@ DecodeStatus RISCVDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
if (Result != MCDisassembler::Fail)
return Result;
}
+ if (STI.hasFeature(RISCV::FeatureVendorXSfvcp)) {
+ LLVM_DEBUG(dbgs() << "Trying SiFive VCIX custom opcode table:\n");
+ Result = decodeInstruction(DecoderTableXSfvcp32, MI, Insn, Address, this,
+ STI);
+ if (Result != MCDisassembler::Fail)
+ return Result;
+ }
LLVM_DEBUG(dbgs() << "Trying RISCV32 table :\n");
return decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI);