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| author | David Green <david.green@arm.com> | 2023-02-05 20:59:49 +0000 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2023-02-05 20:59:49 +0000 |
| commit | c56846a8928f8708f56c0eb36dcd6345e312faa0 (patch) | |
| tree | dc57b6ddc3c20bbd895caf688257eba77c9c66a6 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | b3ab26b4aa2fe242218b1c0cfae9420f2c4021fa (diff) | |
| download | llvm-c56846a8928f8708f56c0eb36dcd6345e312faa0.zip llvm-c56846a8928f8708f56c0eb36dcd6345e312faa0.tar.gz llvm-c56846a8928f8708f56c0eb36dcd6345e312faa0.tar.bz2 | |
[ARM] Remove FlattenVectorShuffle and add PerformVQDMULHCombine.
This removes the FlattenVectorShuffle that folds shuffles through certain
binops. This is now handled by generic DAG combines for all but ARMISD::VQDMULH
where a PerformVQDMULHCombine is added to compensate. It pushes identical
shuffles down through the operation, in a similar way to the other combines in
DAG.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions