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| author | zhongyunde <zhongyunde@huawei.com> | 2023-02-07 11:09:13 +0800 |
|---|---|---|
| committer | zhongyunde <zhongyunde@huawei.com> | 2023-02-07 11:10:27 +0800 |
| commit | 341b1df5bc7ed0baa258592a35a7458a310e43a9 (patch) | |
| tree | a7139ec3301f4caaa7f39b988c33fbd64fb89308 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 39af4659f24026fd3c667ce50a9e798485e1ae98 (diff) | |
| download | llvm-341b1df5bc7ed0baa258592a35a7458a310e43a9.zip llvm-341b1df5bc7ed0baa258592a35a7458a310e43a9.tar.gz llvm-341b1df5bc7ed0baa258592a35a7458a310e43a9.tar.bz2 | |
[AArch64][SVE] Fix crash for DestructiveBinaryCommWithRev zero merging
Address more Destructive type according the review on D141471
* DestructiveUnaryPassthru and DestructiveBinaryImm always return true, don't need fix
* DestructiveTernaryCommWithRev may also return false, but now don't define FalseLanesZero in the backend codegen
Reviewed By: paulwalker-arm
Differential Revision: https://reviews.llvm.org/D142978
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions