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| author | YunQiang Su <wzssyqa@gmail.com> | 2023-08-19 00:35:25 -0400 |
|---|---|---|
| committer | Brad Smith <brad@comstyle.com> | 2023-08-19 00:35:25 -0400 |
| commit | 22a84020d2324ac1f753705497a40c43d8284d94 (patch) | |
| tree | 3b006c5742dcff34b62e43ae360828052d4d9c8e /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 974c6393297c18c968ffafc43ba37f0827d536ea (diff) | |
| download | llvm-22a84020d2324ac1f753705497a40c43d8284d94.zip llvm-22a84020d2324ac1f753705497a40c43d8284d94.tar.gz llvm-22a84020d2324ac1f753705497a40c43d8284d94.tar.bz2 | |
MIPS: unwind, don't save/restore hi/lo for R6
HI/LO registers have been removed in MIPSr6. Save and restore them only for pre-R6.
We keep the memory space for the registers so that we can use the same register indexes for
r6 and pre-r6.
Fixes: #60682
Reviewed By: compnerd
Differential Revision: https://reviews.llvm.org/D156283
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions