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| author | Jim Lin <jim@andestech.com> | 2023-08-19 10:35:00 +0800 |
|---|---|---|
| committer | Jim Lin <jim@andestech.com> | 2023-08-19 11:53:21 +0800 |
| commit | 974c6393297c18c968ffafc43ba37f0827d536ea (patch) | |
| tree | 60cfcf12b7317aab62b2a7515e811095add54279 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 8ee710a40cc51098e6d1249afe9af0e64150f308 (diff) | |
| download | llvm-974c6393297c18c968ffafc43ba37f0827d536ea.zip llvm-974c6393297c18c968ffafc43ba37f0827d536ea.tar.gz llvm-974c6393297c18c968ffafc43ba37f0827d536ea.tar.bz2 | |
[M68k] Add MC support for bchg, bclr and bset instruction
Reviewed By: myhsu
Differential Revision: https://reviews.llvm.org/D116993
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions