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| author | Philipp Tomsich <philipp.tomsich@vrull.eu> | 2023-02-08 08:00:45 +0100 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@vrull.eu> | 2023-02-08 08:00:45 +0100 |
| commit | 0bda199285954dea3b36539a17ea4a0a5bfa6cb1 (patch) | |
| tree | 6774e0597b8ea4e4e2d0955f4f229deb48527d04 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | b0c3132226d521d6693608ee76fb3c0dc260ce89 (diff) | |
| download | llvm-0bda199285954dea3b36539a17ea4a0a5bfa6cb1.zip llvm-0bda199285954dea3b36539a17ea4a0a5bfa6cb1.tar.gz llvm-0bda199285954dea3b36539a17ea4a0a5bfa6cb1.tar.bz2 | |
Revert "[RISCV] Add vendor-defined XTHeadBs (single-bit) extension"
This reverts commit 656188ddc4075eb50260607b3497589873f373d2.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp index 7276d82..bf60cd1 100644 --- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -478,13 +478,6 @@ DecodeStatus RISCVDisassembler::getInstruction(MCInst &MI, uint64_t &Size, if (Result != MCDisassembler::Fail) return Result; } - if (STI.getFeatureBits()[RISCV::FeatureVendorXTHeadBs]) { - LLVM_DEBUG(dbgs() << "Trying XTHeadBs custom opcode table:\n"); - Result = decodeInstruction(DecoderTableTHeadBs32, MI, Insn, Address, this, - STI); - if (Result != MCDisassembler::Fail) - return Result; - } if (STI.getFeatureBits()[RISCV::FeatureVendorXTHeadVdot]) { LLVM_DEBUG(dbgs() << "Trying XTHeadVdot custom opcode table:\n"); Result = |