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| author | Philipp Tomsich <philipp.tomsich@vrull.eu> | 2023-02-08 08:00:34 +0100 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@vrull.eu> | 2023-02-08 08:00:34 +0100 |
| commit | b0c3132226d521d6693608ee76fb3c0dc260ce89 (patch) | |
| tree | 346557969008dc07778dbe5c724984f524906c95 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 94888161c7d9133bf6f32ae0d47a4fb0f41985f2 (diff) | |
| download | llvm-b0c3132226d521d6693608ee76fb3c0dc260ce89.zip llvm-b0c3132226d521d6693608ee76fb3c0dc260ce89.tar.gz llvm-b0c3132226d521d6693608ee76fb3c0dc260ce89.tar.bz2 | |
Revert "[RISCV] Add vendor-defined XTheadBb (basic bit-manipulation) extension"
This reverts commit 19a59099095b3cbc9846e5330de26fca0a44ccbe.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp index 647607a66..7276d82 100644 --- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -478,13 +478,6 @@ DecodeStatus RISCVDisassembler::getInstruction(MCInst &MI, uint64_t &Size, if (Result != MCDisassembler::Fail) return Result; } - if (STI.getFeatureBits()[RISCV::FeatureVendorXTHeadBb]) { - LLVM_DEBUG(dbgs() << "Trying XTHeadBb custom opcode table:\n"); - Result = decodeInstruction(DecoderTableTHeadBb32, MI, Insn, Address, this, - STI); - if (Result != MCDisassembler::Fail) - return Result; - } if (STI.getFeatureBits()[RISCV::FeatureVendorXTHeadBs]) { LLVM_DEBUG(dbgs() << "Trying XTHeadBs custom opcode table:\n"); Result = decodeInstruction(DecoderTableTHeadBs32, MI, Insn, Address, this, |