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path: root/sim/mips/sim-main.h
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1998-05-18* Monster patch - may destablize MIPS sims for a little while.Frank Ch. Eigler1-7/+72
1998-05-07 * sim-main.h (INSN_NAME): New arg `cpu'.Doug Evans1-2/+8
1998-04-29 * sim-main.h, sky-libvpe.c: r59fp_op* functions were called withJames Lemke1-11/+12
1998-04-22Move target specific stuff from sim/common/sim-base.h to sim/mips/sim-main.hJames Lemke1-0/+11
1998-04-21r5900.igen, sim-main.h, sky-libvpe.c: Add run-time option --float-typeJames Lemke1-0/+19
1998-04-21Fix sanitize tag. The proper keyword is "start-sanitize-*", notJason Molenda1-2/+2
1998-04-21For new IGEN simulators, rewrite checks validating correct use of theAndrew Cagney1-37/+47
1998-04-15Debug tx19 built from igen sources.Andrew Cagney1-1/+7
1998-04-14Implement 32 bit MIPS16 instructions listed in m16.igen.Andrew Cagney1-5/+7
1998-04-09* Backed out week-old attempt at enabling quadword memory access onFrank Ch. Eigler1-12/+0
1998-04-09* Temporarily change LOADDRMASK in sky build.Ian Carmichael1-0/+2
1998-04-07* R5900 COP2 is now ready for testing. Let loose the dogs!Frank Ch. Eigler1-0/+11
1998-04-05* R5900 COP2 function nearly complete. PKE sim now aware of new GPUIFFrank Ch. Eigler1-2/+6
1998-04-05aclocal.m4: Don't enable inlining when cross-compiling.Andrew Cagney1-9/+19
1998-04-02Re-do load/store operations so that they work for both 32 and 64 bitAndrew Cagney1-2/+9
1998-04-01sky-vu.[ch]: prototype decls, cast floats to ints before register transferRon Unrau1-3/+4
1998-03-30* Continuing sky R5900 / COP2 work. Added extra sanitize tags to hideFrank Ch. Eigler1-4/+7
1998-03-27* Inserted skeleton of R5900 COP2 simulation. Merged old vu[01].[ch] codeFrank Ch. Eigler1-1/+13
1998-03-03Fix DIV, DIV1 (wrong check for overflow) and DIVU1 (shouldn't checkAndrew Cagney1-1/+1
1998-02-28Add generic sim-info.c:sim_info() function using module mechanism.Andrew Cagney1-1/+1
1998-02-25Finish implementation of r5900 instructions.Andrew Cagney1-0/+16
1998-02-23sim-main.h: Re-arange r5900 registers so that they have their ownAndrew Cagney1-51/+96
1998-02-02Rewrite the mipsI/II/III pending-slot code.Andrew Cagney1-36/+81
1998-02-01mips: Add multi-processor support for r5900. Others might work.Andrew Cagney1-65/+74
1998-01-31igen: Fix SMP simulator generator support.Andrew Cagney1-2/+4
1998-01-21Use macro GPR_SET(N,VAL) to clear zero registers.Andrew Cagney1-2/+5
1997-11-20o Add SIM_SIGFPE to sim-signalsAndrew Cagney1-10/+0
1997-11-20Allow reads/writes to C0_CONFIG register.Andrew Cagney1-1/+18
1997-11-11Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1,Andrew Cagney1-0/+3
1997-11-06Replace global IPC with function argument cia or current instructionAndrew Cagney1-2/+0
1997-11-06IGEN likes to cache the current instruction address (CIA). Change theAndrew Cagney1-49/+48
1997-11-05Rewrite the MIPS simulator's memory model so that it uses the genericAndrew Cagney1-9/+13
1997-11-05Delete -l and -n options, didn't do anything.Andrew Cagney1-1/+0
1997-11-05Rewrite sim_monitor (implements read, write, open, et.al. systemAndrew Cagney1-3/+4
1997-11-04Correct r5900 sanitization.Gavin Romig-Koch1-1/+1
1997-10-29common/sim-bits.h: Document ROTn macro.Andrew Cagney1-0/+3
1997-10-24Add function to fetch 32bit instructionsAndrew Cagney1-23/+28
1997-10-21Use SIM*_OVERFLOW_RESULT defined in sim-alu.hAndrew Cagney1-2/+2
1997-10-21Delete profile support from MIPS simulator, use sim/common/sim-profileAndrew Cagney1-2/+0
1997-10-20Make mips registers of type unsigned_word.Andrew Cagney1-2/+3
1997-10-16Move register definitions and macros out of interp.c and into sim-main.hAndrew Cagney1-1/+318
1997-10-14Move global MIPS simulator variables into sim_cpu struct.Andrew Cagney1-38/+208
1997-10-14o Add support for configuring wordsize, fp hardware and targetAndrew Cagney1-0/+221