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2013-05-24opcodes/Richard Sandiford2-1/+5
* s390-opc.txt (flogr): Require a register pair destination. gas/testsuite/ * gas/s390/zarch-z9-109-err.s, gas/s390/zarch-z9-109-err.l: New test. * gas/s390/s390.exp: Run it.
2013-05-232013-05-23 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel2-2/+7
* s390-opc.c: Fix length operand in RSL_LRDFU and RSL_LRDFEU instruction format. 2013-05-23 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gas/s390/zarch-zEC12.d: Adjust length operands for cdzt, cxzt, czdt, and czxt. * gas/s390/zarch-zEC12.d: Likewise.
2013-05-22include/opcode/Richard Sandiford2-7/+24
2013-05-22 Jürgen Urban <JuergenUrban@gmx.de> * mips.h (M_LQC2_AB, M_SQC2_AB): New macros. opcodes/ 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de> * mips-opc.c (mips_builtin_opcodes): Add R5900 VU0 instructions. gas/ 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de> * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB. gas/testsuite/ 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de> * gas/mips/r5900-full.s, gas/mips/r5900-full.d: Add tests for LQ and SQ macros. * gas/mips/r5900-vu0.s, gas/mips/r5900-vu0.d: New test. * gas/mips/mips.exp: Run it.
2013-05-21opcodes/Peter Bergner3-7/+200
* ppc-dis.c (powerpc_init_dialect): Set default dialect to power8. * ppc-opc.c (BHRBE, ST, SIX, PS, SXL, VXPS_MASK, XX1RB_MASK, XLS_MASK, PPCVSX2): New defines. (powerpc_opcodes) <bcdadd., bcdsub., bctar, bctar, bctarl, clrbhrb, fmrgew, fmrgow, lqarx, lxsiwax, lxsiwzx, lxsspx, mfbhrbe, mffprd, mffprwz, mfvrd, mfvrwz, mfvsrd, mfvsrwz, msgclrp, msgsndp, mtfprd, mtfprwa, mtfprwz, mtsle, mtvrd, mtvrwa, mtvrwz, mtvsrd, mtvsrwa, mtvsrwz, pbt., rfebb, stqcx., stxsiwx, stxsspx, vaddcuq, vaddecuq, vaddeuqm, vaddudm, vadduqm, vbpermq, vcipher, vcipherlast, vclzb, vclzd, vclzh, vclzw, vcmpequd, vcmpequd., vcmpgtsd, vcmpgtsd., vcmpgtud, vcmpgtud., veqv, vgbbd, vmaxsd, vmaxud, vminsd, vminud, vmrgew, vmrgow, vmulesw, vmuleuw, vmulosw, vmulouw, vmuluwm, vnand, vncipher, vncipherlast, vorc, vpermxor, vpksdss, vpksdus, vpkudum, vpkudus, vpmsumb, vpmsumd, vpmsumh, vpmsumw, vpopcntb, vpopcntd, vpopcnth, vpopcntw, vrld, vsbox, vshasigmad, vshasigmaw, vsld, vsrad, vsrd, vsubcuq, vsubecuq, vsubeuqm, vsubudm, vsubuqm, vupkhsw, vupklsw, waitasec, xsaddsp, xscvdpspn, xscvspdpn, xscvsxdsp, xscvuxdsp, xsdivsp, xsmaddasp, xsmaddmsp, xsmsubasp, xsmsubmsp, xsmulsp, xsnmaddasp, xsnmaddmsp, xsnmsubasp, xsnmsubmsp, xsresp, xsrsp, xsrsqrtesp, xssqrtsp, xssubsp, xxleqv, xxlnand, xxlorc>: New instructions. <lxvx, stxvx>: New extended mnemonics. gas/ * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error and clean up warning when using PRINT_OPCODE_TABLE. gas/testsuite/ * gas/ppc/altivec2.d <bcdadd., bcdadd., vaddcuq, vaddecuq, vaddeuqm, vaddudm, vadduqm, vbpermq, vcipher, vcipherlast, vclzb, vclzd, vclzh, vclzw, vcmpequd, vcmpequd., vcmpgtsd, vcmpgtsd., vcmpgtud, vcmpgtud., veqv, vgbbd, vmaxsd, vmaxud, vminsd, vminud, vmrgew, vmrgow, vmulesw, vmuleuw, vmulosw, vmulouw, vmuluwm, vnand, vncipher, vncipherlast, vorc, vpermxor, vpksdss, vpksdus, vpkudum, vpkudus, vpmsumb, vpmsumd, vpmsumh, vpmsumw, vpopcntb, vpopcntd, vpopcnth, vpopcntw, vrld, vsbox, vshasigmad, vshasigmaw, vsld, vsrad, vsrd, vsubcuq, vsubecuq, vsubeuqm, vsubudm, vsubuqm, vupkhsw, vupklsw>: Add new tests. * gas/ppc/altivec2.s: Likewise. * gas/ppc/power8.d <bcdadd., bcdsub., bctar, bctarl, clrbhrb, fmrgew, fmrgow, lqarx, lxsiwax, lxsiwzx, lxsspx, mfbhrbe, mfvsrd, mfvsrwz, msgclrp, msgsndp, mtsle, mtvsrd, mtvsrwa, mtvsrwz, pbt., rfebb, stqcx., stxsiwx, stxsspx, vaddcuq, vaddecuq, vaddeuqm, vaddudm, vadduqm, vbpermq, vcipher, vcipherlast, vclzb, vclzd, vclzh, vclzw, vcmpequd, vcmpequd., vcmpgtsd, vcmpgtsd., vcmpgtud, vcmpgtud., veqv, vgbbd, vmaxsd, vmaxud, vminsd, vminud, vmrgow, vmulesw, vmuleuw, vmulosw, vmulouw, vmuluwm, vnand, vncipher, vncipherlast, vorc, vpermxor, vpksdss, vpksdus, vpkudum, vpkudus, vpmsumb, vpmsumd, vpmsumh, vpmsumw, vpopcntb, vpopcntd, vpopcnth, vpopcntw, vrld, vsbox, vshasigmad, vshasigmaw, vsld, vsrad, vsrd, vsubcuq, vsubecuq, vsubeuqm, vsubuqm, vupkhsw, vupklsw, waitasec, xsaddsp, xscvdpspn, xscvspdpn, xscvsxdsp, xscvuxdsp, xsdivsp, xsmaddasp, xsmaddmsp, xsmsubasp, xsmsubmsp, xsmulsp, xsnmaddasp, xsnmaddmsp, xsnmsubasp, xsnmsubmsp, xsresp, xsrsp, xsrsqrtesp, xssqrtsp, xssubsp, xxleqv, xxlnand, xxlorc>: Add new tests. * gas/ppc/power8.s Likewise. * gas/ppc/vsx.d <lxvd2x, stxvd2x>: Add new tests. * gas/ppc/vsx.s Likewise. * gas/ppc/vsx2.d: New test file. * gas/ppc/vsx2.s: Likewise. * gas/ppc/ppc.exp: Run it.
2013-05-17 * ia64-raw.tbl: Replace non-ASCII char.Alan Modra4-10/+16
* ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerate.
2013-05-15gas/Saravanan Ekanathan3-2/+7
* i386-gen.c (cpu_flag_init): Add CpuFSGSBase in CPU_BDVER3_FLAGS. * i386-init.h: Regenerated.
2013-05-13gas/Yufeng Zhang3-4/+9
* testsuite/gas/aarch64/diagnostic.s: Update. * testsuite/gas/aarch64/diagnostic.l: Ditto. * testsuite/gas/aarch64/movi.s: Add new tests. * testsuite/gas/aarch64/movi.d: Update. opcodes/ * aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Remove assertion. * aarch64-opc.c (operand_general_constraint_met_p): Relax the range check from [0, 255] to [-128, 255].
2013-05-10binutils/ChangeLog:Andrew Pinski3-3/+55
* doc/binutils.texi: Document -Mvirt disassembler option. gas/ChangeLog: * config/tc-mips.c (struct mips_set_options): New ase_virt field. (mips_opts): Update for the new field. (file_ase_virt): New variable. (ISA_SUPPORTS_VIRT_ASE): New macro. (ISA_SUPPORTS_VIRT64_ASE): New macro. (MIPS_CPU_ASE_VIRT): New define. (is_opcode_valid): Handle ase_virt. (macro_build): Handle "+J". (validate_mips_insn): Likewise. (mips_ip): Likewise. (enum options): Add OPTION_VIRT and OPTION_NO_VIRT. (md_longopts): Add mvirt and mnovirt (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT. (mips_after_parse_args): Handle ase_virt field. (s_mipsset): Handle "virt" and "novirt". (mips_elf_final_processing): Add a comment about virt ASE might need a new flag. (md_show_usage): Print out the usage of -mvirt and mno-virt options. * doc/c-mips.texi: Document -mvirt and -mno-virt. Document ".set virt" and ".set novirt". gas/testsuite/ChangeLog: * gas/mips/mips.exp: Run virt and virt64 testcases. * gas/mips/virt.d: New file. * gas/mips/virt.s: New file. * gas/mips/virt64.d: New file. * gas/mips/virt64.s: New file. include/opcode/ChangeLog: * mips.h (OP_MASK_CODE10): Correct definition. (OP_SH_CODE10): Likewise. Add a comment that "+J" is used now for OP_*CODE10. (INSN_ASE_MASK): Update. (INSN_VIRT): New macro. (INSN_VIRT64): New macro opcodes/ChangeLog: * mips-dis.c (mips_arch_choices): Add INSN_VIRT to mips32r2 . Add INSN_VIRT and INSN_VIRT64 to mips64r2. (parse_mips_dis_option): Handle the virt option. (print_insn_args): Handle "+J". (print_mips_disassembler_options): Print out message about virt64. * mips-opc.c (IVIRT): New define. (IVIRT64): New define. (mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp VIRT instructions. Move rfe to the bottom as it conflicts with tlbgp.
2013-05-09 * ppc-opc.c (extract_vlesi): Properly sign extend.Alan Modra2-6/+8
(extract_vlensi): Likewise. Comment reason for setting invalid.
2013-05-02 * archures.c: Add some more MSP430 machine numbers.Nick Clifton2-135/+581
* config.bfd (msp430): Define targ_selvecs. * configure.in: Add bfd_elf32_msp430_ti_vec. * cpu-msp430.c: Add some more MSP430 machine numbers. * elf32-msp430.c Add support for MSP430X relocations. Add support for TI compiler generated relocations. Add support for sym_diff relocations. Add support for relaxing out of range short branches into long branches. Add support for MSP430 attribute section. * reloc.c: Add MSP430X relocations. * targets.c: Add bfd_elf32_msp430_ti_vec. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * readelf.c: Add support for MSP430X architecture. * readelf.exp: Expect -wi test to fail for the MSP430. * config/tc-msp430.c: Add support for the MSP430X architecture. Add code to insert a NOP instruction after any instruction that might change the interrupt state. Add support for the LARGE memory model. Add code to initialise the .MSP430.attributes section. * config/tc-msp430.h: Add support for the MSP430X architecture. * doc/c-msp430.texi: Document the new -mL and -mN command line options. * NEWS: Mention support for the MSP430X architecture. * gas/all/gas.exp: Skip the DIFF1 test for the MSP430. Expect the FORWARD test to pass for the MSP430. Skip the REDEF tests for the MSP430. Expect the 930509A test to fail for the MSP430. * gas/all/sleb128-4.d: Skip for the MSP430. * gas/elf/elf.exp: Set target_machine to msp430 for the MSP430. Skip the EHOPT0 test for the MSP430. Skip the REDEF and EQU-RELOC tests for the MSP430. * gas/elf/section2.e-msp430: New file. * gas/lns/lns-big-delta.d: Remove expectation of 20-bit addresses. * gas/lns/lns.exp: Use alternate LNS COMMON test for the MSP430. * gas/msp430/msp430x.s: New test. * gas/msp430/msp430x.d: Expected disassembly. * gas/msp430/msp430.exp: Run new test. * gas/msp430/opcode.d: Update expected disassembly. * msp430.h: Add MSP430X relocs. Add some more MSP430 machine numbers. Add values used by .MSP430.attributes section. * msp430.h: Add patterns for MSP430X instructions. * Makefile.am: Add emsp430X.c * Makefine.in: Regenerate. * configure.tgt (msp430): Add msp430X emulation. * ldmain.c (multiple_definition): Only disable relaxation if it was enabled by the user. * ldmain.h (RELAXATION_ENABLED_BY_USER): New macro. * emulparams/msp430all.sh: Add support for MSP430X. * emultempl/generic.em: (before_parse): Enable relaxation for the MSP430. * scripttempl/msp430.sc: Reorganize sections. Add .rodata section. * scripttempl/msp430_3.sc: Likewise. * NEWS: Mention support for MSP430X. * ld-elf/flags1.d: Expect this test to pass on the MSP430. * ld-elf/init-fini-arrays.d: Expect this test to fail on the MSP430. * ld-elf/merge.d: Expect this test to pass on the MSP430. * ld-elf/sec64k.exp: Skip these tests for the MSP430. * ld-gc/pr13683.d: Expect this test to fail on the MSP430. * ld-srec/srec.exp: Expect these tests to fail on the MSP430. * ld-undefined/undefined.exp: Expect the UNDEFINED LINE test to fail on the MSP430. * msp430-dis.c: Add support for MSP430X instructions.
2013-04-242013-04-24 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore2-1/+6
gas/ * config/tc-nios2.c (nios2_control_register_arg_p): Rename "fstatus" control register to "eccinj". opcodes/ * nios2-opc.c (nios2_builtin_reg): Rename "fstatus" control register to "eccinj".
2013-04-17 PR binutils/15369Nick Clifton2-4/+10
* cgen-dis.c (hash_insn_array): Use CGEN_CPU_INSN_ENDIAN instead of CGEN_CPU_ENDIAN. (hash_insns_list): Likewise.
2013-04-10opcodes/Jan Kratochvil2-1/+6
* rl78-dis.c (print_insn_rl78): Use alternative form as a GCC false warning workaround.
2013-04-08gas/testsuite/Jan Beulich3-15/+8
2013-04-08 Jan Beulich <jbeulich@suse.com> * gas/i386/x86-64-opcode.s: Flesh out LOOP and J*CXZ sections. Correct comments in Jcc section. * gas/i386/x86-64-opcode.d: Refresh. * gas/i386/ilp32/x86-64-opcode.d: Refresh. opcodes/ 2013-04-08 Jan Beulich <jbeulich@suse.com> * i386-opc.tbl: Fold 64-bit and non-64-bit jecxz entries. * i386-tbl.h: Re-generate.
2013-04-06Increase the accuracy of sparc instruction aliases.David S. Miller3-134/+219
Make current with UA2011 specification. Add an F_PREFERRED opcode flag that indicates a preferred alias when multiple aliases for the same opcode exists. For 'lzd': Add 'lzcnt' as primary instruction, and make 'lzd' an alias. Add 'ldtw', 'ldtwa', 'sttw', 'sttwa': The modern opcode for for 'ldd', 'ldda', 'std', and 'stda' on integer registers. Mark the latter now as aliases. For 'flush': Support "[address]" syntax as well as plain "address". Rework 'mov' aliases for 'wr': Eliminate bogus three operand moves, and encode the instructions properly for the "mov REG, %ASR" cases, specifically we should encode the register in rs2 not rs1 as per The SPARC V8 Architecture Manual. Add missing cbcond aliases: c{w,x}bz, c{w,x}blu, c{w,x}bnz, c{w,x}bgeu Add 'd' suffix VIS logical ops: The primary opcode for 'fzero' is now 'fzerod' (compare with 'fzeros'), for example. And thus 'fzero' is now an alias. Add modern opcodes for condition code setting edge instructions: They are now edgeN{,l}cc instead of plain edgeN{,l}. Add modern opcodes for VIS comparisons: All VIS comparisons now start with prefix "fp", retain the older variants as aliases. The signed variants for equal and not-equal have "u" aliases to show that these comparisons are equally suited for unsigned compares. Update existing test cases as needed, and add several new ones. include/opcode/ * sparc.h (F_PREFERRED): Define. (F_PREF_ALIAS): Define. opcodes/ * sparc-dis.c (compare_opcodes): When encountering multiple aliases of an opcode, prefer the one with F_PREFERRED set. * sparc-opc.c (sparc_opcodes): Add ldtw, ldtwa, sttw, sttwa, lzcnt, flush with '[address]' syntax, and missing cbcond pseudo ops. Make 64-bit VIS logical ops have "d" suffix in their names, mark existing mnenomics as aliases. Add "cc" suffix to edge instructions generating condition codes, mark existing mnenomics as aliases. Add "fp" prefix to VIS compare instructions, mark existing mnenomics as aliases. gas/testsuite/ * gas/sparc/cbcond.s: Add tests for new opcode aliases. * gas/sparc/cbcond.d: Updated. * gas/sparc/hpcvis3.s: Add tests for new opcode aliases. * gas/sparc/hpcvis3.d: Updated. * gas/sparc/v8-movwr-imm.d: Fix expected disassembly. * gas/sparc/edge.s: New test. * gas/sparc/edge.d: Expected disassembly. * gas/sparc/flush.s: New test. * gas/sparc/flush.d: Expected disassembly. * gas/sparc/ldd_std.s: New test. * gas/sparc/ldd_std.d: Expected disassembly. * gas/sparc/ldtw_sttw.s: New test. * gas/sparc/ldtw_sttw.d: Expected disassembly. * gas/sparc/sparc.exp: Run new tests.
2013-04-03 * elf32-v850.c (v850_elf_is_target_special_symbol): New function.Nick Clifton3-9/+40
(bfd_elf32_bfd_is_target_special_symbol): Define. * v850.h (V850_INVERSE_PCREL): Define. * v850-dis.c (print_value): With V850_INVERSE_PCREL compute the destination address by subtracting the operand from the current address. * v850-opc.c (insert_u16_loop): Disallow negative offsets. Store a positive value in the insn. (extract_u16_loop): Do not negate the returned value. (D16_LOOP): Add V850_INVERSE_PCREL flag. (ceilf.sw): Remove duplicate entry. (cvtf.hs): New entry. (cvtf.sh): Likewise. (fmaf.s): Likewise. (fmsf.s): Likewise. (fnmaf.s): Likewise. (fnmsf.s): Likewise. (maddf.s): Restrict to E3V5 architectures. (msubf.s): Likewise. (nmaddf.s): Likewise. (nmsubf.s): Likewise.
2013-03-27Properly check address mode for SIBH.J. Lu2-4/+10
gas/testsuite/ * gas/i386/addr32.s: Add an SIB test. * gas/i386/addr32.d: Updated. opcodes/ * i386-dis.c (get_sib): Add the sizeflag argument. Properly check address mode. (print_insn): Pass sizeflag to get_sib.
2013-03-27 PR binutils/15068Nick Clifton2-62/+455
* tic6x-dis.c: Add support for displaying 16-bit insns. * tic6xc-insn-formats.h (FLD): Add use of bitfield array. Add 16-bit opcodes. * tic6xc-opcode-table.h: Add 16-bit insns. * tic6x.h: Add support for 16-bit insns. * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array. * gas/tic6x/insns16-d-unit.s: New test. * gas/tic6x/insns16-d-unit.d: Expected disassembly. * gas/tic6x/insns16-ddec.s: New test. * gas/tic6x/insns16-ddec.d: Expected disassembly. * gas/tic6x/insns16-dinc.s: New test. * gas/tic6x/insns16-dinc.d: Expected disassembly. * gas/tic6x/insns16-dind.s: New test. * gas/tic6x/insns16-dind.d: Expected disassembly. * gas/tic6x/insns16-doff4.s: New test. * gas/tic6x/insns16-doff4.d: Expected disassembly. * gas/tic6x/insns16-l-unit.s: New test. * gas/tic6x/insns16-l-unit.d: Expected disassembly. * gas/tic6x/insns16-lsd-unit.s: New test. * gas/tic6x/insns16-lsd-unit.d: Expected disassembly. * gas/tic6x/insns16-m-unit.s: New test. * gas/tic6x/insns16-m-unit.d: Expected disassembly. * gas/tic6x/insns16-s-unit-pcrel.s: New test. * gas/tic6x/insns16-s-unit-pcrel.d: Expected disassembly. * gas/tic6x/insns16-s-unit: New test. * gas/tic6x/insns16-s-unit.d: Expected disassembly.
2013-03-20* include/opcode/tic6x.h: add tic6x_coding_dreg_(msb|lsb) field coding type inNick Clifton2-3/+20
order to encode separately the msb and lsb of a register pair ; this will be needed to encode the opcodes the same way as Ti assembler does. * gas/config/tc-tic6x.c: handle tic6x_coding_dreg_(msb|lsb) field coding types and use it to encode register pair numbers when required. * opcodes/tic6x-dis.c: decodes opcodes that have individual msb and lsb halves in src1 & src2 fields ; discard the src1 (lsb) value and only use src2 (msb), discarding bit 0, to follow what Ti SDK does in that case as any value in the src1 field yields the same output with SDK disassembler. * include/opcode/tic6x-opcode-table.h: modify absdp, dpint, dpsp, dptrunc, rcpdp and rsqrdp opcodes to use the new field coding types. * gas/testsuite/gas/tic6x/insns-c674x.d, gas/testsuite/gas/tic6x/insns-c674x.s : add test case for the newly generated opcode but keep the old ones as they seem legit as per Ti disassembler output.
2013-03-12Eliminate warning message.Michael Eager2-1/+7
* opcodes/mips-dis.c (print_insn_args): Modify def of reg.
2013-03-122013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2-0/+6
include/ * opcode/nios2.h (OPX_WRPRS): New define. (OP_MATCH_WRPRS): Likewise. opcodes/ * nios2-opc.c (nios2_builtin_opcodes): Add entry for wrprs. gas/ * config/tc-nios2.c (nios2_assemble_args_ds): New function. (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries. gas/testsuite/ * gas/nios2/nios2.exp: Run wrprs. * gas/nios2/wrprs.d: New file. * gas/nios2/wrprs.s: Likewise.
2013-03-122013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2-0/+6
include/ * opcode/nios2.h (OP_RDPRS): New define. (OP_MATCH_RDPRS): Likewise. opcodes/ * nios2-opc.c (nios2_builtin_opcodes): Add entry for rdprs. gas/testsuite/ * gas/nios2/nios2.exp: Run rdprs. * gas/nios2/rdprs.d: New file. * gas/nios2/rdprs.s: Likewise.
2013-03-122013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2-0/+5
opcodes/ * nios2-opc.c (nios2_builtin_regs): Add sstatus alias for ba register. gas/testsuite/ * gas/nios2/nios2.exp: Run registers. * gas/nios2/registers.d: New file. * gas/nios2/registers.s: Likewise.
2013-03-11Add support for AArch32 CRC instruction in ARMv8.Kyrylo Tkachov2-1/+27
gas/ChangeLog 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/tc-arm.c (crc_ext_armv8): New feature set. (UNPRED_REG): New macro. (do_crc32_1): New function. (do_crc32b, do_crc32h, do_crc32w, do_crc32cb, do_crc32ch, do_crc32cw): Likewise. (TUEc): New macro. (insns): Add entries for crc32 mnemonics. (arm_extensions): Add entry for crc. include/opcode/ChangeLog 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * arm.h (CRC_EXT_ARMV8): New constant. (ARCH_CRC_ARMV8): New macro. opcodes/ChangeLog 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * arm-dis.c (arm_opcodes): Add entries for CRC instructions. (thumb32_opcodes): Likewise. (print_insn_thumb32): Handle 'S' control char. gas/testsuite/ChangeLog 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gas/arm/crc32-bad.d: New file. * gas/arm/crc32-bad.l: Likewise. * gas/arm/crc32-bad.s: Likewise. * gas/arm/crc32.d: Likewise. * gas/arm/crc32.s: Likewise.
2013-03-08 PR binutils/15241Nick Clifton2-2/+11
* lm32.cpu (Control and status registers): Add CFG2, PSW, TLBVADDR, TLBPADDR and TLBBADVADDR. * lm32-desc.c: Regenerate.
2013-03-02Add RegRex64 to rizH.J. Lu3-5/+10
* i386-reg.tbl (riz): Add RegRex64. * i386-tbl.h: Regenerated.
2013-02-28include/opcode/Yufeng Zhang5-390/+513
* aarch64.h (AARCH64_FEATURE_CRC): New macro. opcodes/ * aarch64-tbl.h (QL_I3SAMEW, QL_I3WWX): New macros. (aarch64_feature_crc): New static. (CRC): New macro. (aarch64_opcode_table): Add entries for the crc32b, crc32h, crc32w, crc32x, crc32cb, crc32ch, crc32cw and crc32cx instructions. * aarch64-asm-2.c: Re-generate. * aarch64-dis-2.c: Ditto. * aarch64-opc-2.c: Ditto. gas/ * config/tc-aarch64.c (aarch64_features): Add the 'crc' option. gas/testsuite/ * gas/aarch64/crc32.s: New test. * gas/aarch64/crc32.d: Ditto.
2013-02-27 * rl78-decode.opc (rl78_decode_opcode): Fix typo.Alan Modra3-202/+208
* rl78-decode.c: Regenerate.
2013-02-25 * rl78-decode.opc: Fix encoding of DIVWU insn.Nick Clifton3-6/+16
* rl78-decode.c: Regenerate. * config/rl78-parse.y: Fix encoding of DIVWU insn.
2013-02-19Implement Intel SMAP instructionsH.J. Lu7-2762/+2818
gas/ PR gas/15159 * config/tc-i386.c (cpu_arch): Add ".smap". * doc/c-i386.texi: Document smap. gas/testsuite/ PR gas/15159 * gas/i386/i386.exp: Run smap and x86-64-smap. * gas/i386/smap.d: New file. * gas/i386/smap.s: likewise. * gas/i386/x86-64-smap.d: likewise. opcodes/ PR gas/15159 * i386-dis.c (rm_table): Add clac and stac to RM_0F01_REG_1. * i386-gen.c (cpu_flag_init): Add CPU_SMAP_FLAGS. (cpu_flags): Add CpuSMAP. * i386-opc.h (CpuSMAP): New. (i386_cpu_flags): Add cpusmap. * i386-opc.tbl: Add clac and stac. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2013-02-15 * metag-dis.c: Initialize outf->bytes_per_chunk to 4Nick Clifton2-0/+7
which also makes the disassembler output be in little endian like it should be. * metag/labelarithmetic.d: Fix the expected disassembler output to be in little endian format * metag/metacore12.d: likewise * metag/metacore21.d: likewise * metag/metacore21ext.d: likewise * metag/metadsp21.d: likewise * metag/metadsp21ext.d: likewise * metag/metafpu.d: likewise * metag/metafpuext.d: likewise * metag/tls.d: likewise * ld-metag/pcrel.d: Fix the expected disassembler output to be in little endian format * ld-metag/shared.d: likewise * ld-metag/stub.d: likewise * ld-metag/stub_pic_app.d: likewise * ld-metag/stub_pic_shared.d: likewise * ld-metag/stub_shared.d: likewise
2013-02-14opcodes/Yufeng Zhang2-15/+24
* aarch64-opc.c (aarch64_prfops): Change unnamed operation 'name' fields to NULL. (aarch64_print_operand): Adjust the printing for AARCH64_OPND_PRFOP. gas/ * config/tc-aarch64.c (md_begin): Change to check if 'name' is NULL. gas/testsuite/ * gas/aarch64/system.s: Add tests. * gas/aarch64/system.d: Update.
2013-02-13Correct ChangeLog dates.Maciej W. Rozycki1-1/+1
2013-02-13 opcodes/Maciej W. Rozycki2-0/+8
* mips-dis.c (is_compressed_mode_p): Only match symbols from the section disassembled. binutils/testsuite/ * binutils-all/mips/mixed-micromips.d: New test. * binutils-all/mips/mixed-mips16.d: New test. * binutils-all/mips/mixed-micromips.s: New test source. * binutils-all/mips/mixed-mips16.s: New test source. * binutils-all/mips/mips.exp: New file.
2013-02-112013-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>Richard Earnshaw2-2/+6
* arm-dis.c: Update strht pattern. * gas/arm/archv6t2.s: Add strht and ldrht tests. * gas/arm/archv6t2.d: Add disassembly patterns for the above.
2013-02-09gas/Richard Sandiford2-13/+19
2013-02-09 Jürgen Urban <JuergenUrban@gmx.de> * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro. (macro): Use it. Assert that trunc.w.s is not used for r5900. opcodes/ 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de> * mips-opc.c (mips_builtin_opcodes): Enable l.d and s.d macros for single-float. Disable ll, lld, sc and scd for EE. Disable the trunc.w.s macro for EE. gas/testsuite/ 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de> * gas/mips/24k-triple-stores-2.d, gas/mips/24k-triple-stores-2.s, gas/mips/micromips@24k-triple-stores-2.d: Move "sc" tests to... * gas/mips/24k-triple-stores-2-llsc.d, gas/mips/24k-triple-stores-2-llsc.s, gas/mips/micromips@24k-triple-stores-2-llsc.d: ...these new tests. * gas/mips/r5900-full.d, gas/mips/r5900-full.s: Verify that the MIPS ISA level can be upgraded to support ll, sc, lld and scd. * gas/mips/l_d-single.d, gas/mips/s_d-single.d, gas/mips/r5900-nollsc.l, gas/mips/r5900-nollsc.s: New tests. * gas/mips/mips.exp: Update accordingly. Add "nollsc" to r5900 properties.
2013-02-062013-02-06 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore8-0/+865
Andrew Jenner <andrew@codesourcery.com> Based on patches from Altera Corporation. bfd/ * Makefile.am (ALL_MACHINES): Add cpu-nios2.lo. (ALL_MACHINES_CFILES): Add cpu-nios2.c. (BFD_BACKENDS): Add elf32-nios2.lo. (BFD32_BACKENDS_CFILES): Add elf32-nios2.c. * Makefile.in: Regenerated. * configure.in: Add entries for bfd_elf32_bignios2_vec and bfd_elf32_littlenios2_vec. * configure: Regenerated. * config.bfd: Add cases for nios2. * archures.c (enum bfd_architecture): Add bfd_arch_nios2. (bfd_mach_nios2): Define. (bfd_nios2_arch): Declare. (bfd_archures_list): Add bfd_nios2_arch. * targets.c (bfd_elf32_bignios2_vec): Declare. (bfd_elf32_littlenios2_vec): Declare. (_bfd_target_vector): Add entries for bfd_elf32_bignios2_vec and bfd_elf32_littlenios2_vec. * elf-bfd.h (enum elf_target_id): Add NIOS2_ELF_DATA. * reloc.c (enum bfd_reloc_code_real): Add Nios II relocations. * bfd-in2.h: Regenerated. * libbfd.h: Regenerated. * cpu-nios2.c: New file. * elf32-nios2.c: New file. opcodes/ * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and nios2-opc.c. * Makefile.in: Regenerated. * configure.in: Add case for bfd_nios2_arch. * configure: Regenerated. * disassemble.c (ARCH_nios2): Define. (disassembler): Add case for bfd_arch_nios2. * nios2-dis.c: New file. * nios2-opc.c: New file. include/ * dis-asm.h (print_insn_big_nios2): Declare. (print_insn_little_nios2): Declare. include/elf * nios2.h: New file. include/opcode/ * nios2.h: New file. gas/ * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c. (TARGET_CPU_HFILES): Add config/tc-nios2.h. * Makefile.in: Regenerated. * configure.tgt: Add case for nios2*-linux*. * config/obj-elf.c: Conditionally include elf/nios2.h. * config/tc-nios2.c: New file. * config/tc-nios2.h: New file. * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set NIOSII. * doc/as.texinfo (Overview): Add Nios II options. (Machine Dependencies): Include c-nios2.texi. * doc/c-nios2.texi: New file. * NEWS: Note Altera Nios II support. gas/testsuite/ * gas/nios2/add.d: New. * gas/nios2/add.s: New. * gas/nios2/align_fill.d: New. * gas/nios2/align_fill.s: New. * gas/nios2/align_text.d: New. * gas/nios2/align_text.s: New. * gas/nios2/and.d: New. * gas/nios2/and.s: New. * gas/nios2/branch.d: New. * gas/nios2/branch.s: New. * gas/nios2/break.d: New. * gas/nios2/break.s: New. * gas/nios2/bret.d: New. * gas/nios2/bret.s: New. * gas/nios2/cache.d: New. * gas/nios2/cache.s: New. * gas/nios2/call26.d: New. * gas/nios2/call26.s: New. * gas/nios2/call.d: New. * gas/nios2/call.s: New. * gas/nios2/cmp.d: New. * gas/nios2/cmp.s: New. * gas/nios2/comments.d: New. * gas/nios2/comments.s: New. * gas/nios2/complex.d: New. * gas/nios2/complex.s: New. * gas/nios2/ctl.d: New. * gas/nios2/ctl.s: New. * gas/nios2/custom.d: New. * gas/nios2/custom.s: New. * gas/nios2/etbt.d: New. * gas/nios2/etbt.s: New. * gas/nios2/flushda.d: New. * gas/nios2/flushda.s: New. * gas/nios2/illegal.l: New. * gas/nios2/illegal.s: New. * gas/nios2/jmp.d: New. * gas/nios2/jmp.s: New. * gas/nios2/ldb.d: New. * gas/nios2/ldb.s: New. * gas/nios2/ldh.d: New. * gas/nios2/ldh.s: New. * gas/nios2/ldw.d: New. * gas/nios2/ldw.s: New. * gas/nios2/lineseparator.d: New. * gas/nios2/lineseparator.s: New. * gas/nios2/mov.d: New. * gas/nios2/movia.d: New. * gas/nios2/movia.s: New. * gas/nios2/movi.d: New. * gas/nios2/movi.s: New. * gas/nios2/mov.s: New. * gas/nios2/mul.d: New. * gas/nios2/mul.s: New. * gas/nios2/nios2.exp: New. * gas/nios2/nor.d: New. * gas/nios2/nor.s: New. * gas/nios2/or.d: New. * gas/nios2/or.s: New. * gas/nios2/ret.d: New. * gas/nios2/ret.s: New. * gas/nios2/rol.d: New. * gas/nios2/rol.s: New. * gas/nios2/rotate.d: New. * gas/nios2/rotate.s: New. * gas/nios2/stb.d: New. * gas/nios2/stb.s: New. * gas/nios2/sth.d: New. * gas/nios2/sth.s: New. * gas/nios2/stw.d: New. * gas/nios2/stw.s: New. * gas/nios2/sub.d: New. * gas/nios2/sub.s: New. * gas/nios2/sync.d: New. * gas/nios2/sync.s: New. * gas/nios2/trap.d: New. * gas/nios2/trap.s: New. * gas/nios2/tret.d: New. * gas/nios2/tret.s: New. * gas/nios2/warn_noat.l: New. * gas/nios2/warn_noat.s: New. * gas/nios2/warn_nobreak.l: New. * gas/nios2/warn_nobreak.s: New. * gas/nios2/xor.d: New. * gas/nios2/xor.s: New. ld/ * Makefile.am (enios2elf.c): New rule. * Makefile.in: Regenerated. * configure.tgt: Add case for nios2*-*-*. * emulparams/nios2elf.sh: New file. * NEWS: Note Altera Nios II support. ld/testsuite/ * ld-nios2/emit-relocs-1a.s: New. * ld-nios2/emit-relocs-1b.s: New. * ld-nios2/emit-relocs-1.d: New. * ld-nios2/emit-relocs-1.ld: New. * ld-nios2/gprel.d: New. * ld-nios2/gprel.s: New. * ld-nios2/hilo16.d: New. * ld-nios2/hilo16.s: New. * ld-nios2/hilo16_symbol.s: New. * ld-nios2/imm5.d: New. * ld-nios2/imm5.s: New. * ld-nios2/imm5_symbol.s: New. * ld-nios2/nios2.exp: New. * ld-nios2/pcrel16.d: New. * ld-nios2/pcrel16_label.s: New. * ld-nios2/pcrel16.s: New. * ld-nios2/relax_callr.d: New. * ld-nios2/relax_callr.ld: New. * ld-nios2/relax_callr.s: New. * ld-nios2/relax_cjmp.d: New. * ld-nios2/relax_cjmp.s: New. * ld-nios2/relax_jmp.ld: New. * ld-nios2/relax_section.d: New. * ld-nios2/relax_section.s: New. * ld-nios2/relax_ujmp.d: New. * ld-nios2/relax_ujmp.s: New. * ld-nios2/reloc.d: New. * ld-nios2/reloc.s: New. * ld-nios2/reloc_symbol.s: New. * ld-nios2/s16.d: New. * ld-nios2/s16.s: New. * ld-nios2/s16_symbol.s: New. * ld-nios2/u16.d: New. * ld-nios2/u16.s: New. * ld-nios2/u16_symbol.s: New. * ld-elf/indirect.exp: Skip on targets that don't support -shared -fPIC. * ld-elfcomm/elfcomm.exp: Build with -G0 for nios2. * ld-plugin/lto.exp: Skip shared library tests on targets that don't support them. Skip execution tests on non-native targets. binutils/ * readelf.c: Include elf/nios2.h. (dump_relocations): Add case for EM_ALTERA_NIOS2. (get_nios2_dynamic_type): New. (get_dynamic_type): Add case for EM_ALTERA_NIOS2. (is_32bit_abs_reloc): Fix EM_ALTERA_NIOS2 case. (is_16bit_abs_reloc): Likewise. (is_none_reloc): Add EM_ALTERA_NIOS2 and EM_NIOS32 cases. * NEWS: Note Altera Nios II support. * MAINTAINERS: Add Nios II maintainers.
2013-02-04 * po/POTFILES.in: Regenerate.Alan Modra4-1013/+1020
* rl78-decode.c: Regenerate. * rx-decode.c: Regenerate.
2013-01-30include/opcode/Yufeng Zhang8-659/+732
2013-01-30 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64.h (aarch64_op): Add OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2. opcodes/ 2013-01-30 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64-tbl.h (aarch64_opcode_table): Flag sshll, sshll2, ushll and ushll2 with F_HAS_ALIAS. Add entries for sxtl, sxtl2, uxtl and uxtl2. * aarch64-asm.c (convert_xtl_to_shll): New function. (convert_to_real): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by calling convert_xtl_to_shll. * aarch64-dis.c (convert_shll_to_xtl): New function. (convert_to_alias): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by calling convert_shll_to_xtl. * aarch64-gen.c: Update copyright year. * aarch64-asm-2.c: Re-generate. * aarch64-dis-2.c: Re-generate. * aarch64-opc-2.c: Re-generate. gas/testsuite/ 2013-01-30 Yufeng Zhang <yufeng.zhang@arm.com> * gas/aarch64/alias.s: Add new tests. * gas/aarch64/alias.d: Update. * gas/aarch64/no-aliases.d: Update.
2013-01-24Add support for V850E3V5 architectureNick Clifton3-197/+955
2013-01-17include/opcode/Yufeng Zhang5-10/+28
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64.h (aarch64_op): Remove OP_V_MOVI_B. opcodes/ 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Handle 8-bit MOVI. * aarch64-dis.c (aarch64_ext_advsimd_imm_modified): Likewise. * aarch64-opc.c (operand_general_constraint_met_p): For AARCH64_MOD_LSL, move the range check on the shift amount before the alignment check; change to call set_sft_amount_out_of_range_error instead of set_imm_out_of_range_error. * aarch64-tbl.h (QL_SIMD_IMM_B): Replace NIL with LSL. (aarch64_opcode_table): Remove the OP enumerator from the asimdimm 8-bit MOVI entry; change the 2nd operand from SIMD_IMM to SIMD_IMM_SFT. gas/ 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> * config/tc-aarch64.c (output_operand_error_record): Change to output the out-of-range error message as value-expected message if there is only one single value in the expected range. (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with LSL #0 as a programmer-friendly feature. gas/testsuite/ 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> * gas/aarch64/diagnostic.l: Update. * gas/aarch64/movi.s: Add tests. * gas/aarch64/movi.d: Update. * gas/aarch64/programmer-friendly.s: Add comment.
2013-01-16Add OPERAND_TYPE_IMM32_64H.J. Lu4-2/+16
* i386-gen.c (operand_type_init): Add OPERAND_TYPE_IMM32_64. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2013-01-15 * config/tc-v850.c (md_assemble): Allow signed values forNick Clifton3-2/+10
V850E_IMMEDIATE. * gas/v850/basic.exp: Allow for variations in reloc names. * gas/v850/split-lo16.d: Likewise. * gas/v850/v850e1.s: Add more tests of the PREPARE insn. * gas/v850/v850e1.d: Update expected disassembly. * v850-dis.c (get_operand_value): Sign extend V850E_IMMEDIATE values. * v850-opc.c (IMM16LO): Add V850_OPERAND_SIGNED attribute.
2013-01-14 * metag-dis.c (REG_WIDTH): Increase to 64.Nick Clifton2-1/+5
* gas/metag/metadsp21.d: Fix expected MMOV disassembly.
2013-01-11include/opcode/Peter Bergner3-1/+76
* ppc.h (PPC_OPCODE_POWER8): New define. (PPC_OPCODE_HTM): Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power8", "pwr8" and "htm" entries. * ppc-opc.c (HTM_R, HTM_SI, XRTRB_MASK, XRTRARB_MASK, XRTLRARB_MASK, XRTARARB_MASK, XRTBFRARB_MASK, XRCL, POWER8, PPCHTM): New defines. (SH6): Update. <"tabort.", "tabortdc.", "tabortdci.", "tabortwc.", "tabortwci.", "tbegin.", "tcheck", "tend.", "trechkpt.", "treclaim.", "tsr.">: Add POWER8 HTM opcodes. <"tendall.", "tresume.", "tsuspend.">: Add POWER8 HTM extended opcodes. gas/ * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm. * doc/c-ppc.texi (PowerPC-Opts): Likewise. * config/tc-ppc.c (md_show_usage): Likewise. (ppc_handle_align): Handle power8's group ending nop. gas/testsuite/ * gas/ppc/htm.d: New test. * gas/ppc/htm.s: Likewise. * gas/ppc/power8.d: Likewise. * gas/ppc/power8.s: Likewise. * gas/ppc/ppc.exp: Run them.
2013-01-10 * common.h: Fix case of "Meta".Nick Clifton7-0/+3409
* metag.h: New file. * dis-asm.h (print_insn_metag): New declaration. * metag.h: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure: Regenerate. * configure.in: Add Meta. * disassemble.c: Add Meta support. * metag-dis.c: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * archures.c (bfd_mach_metag): New. * bfd-in2.h: Regenerate. * config.bfd: Add Meta. * configure: Regenerate. * configure.in: Add Meta. * cpu-metag.c: New file. * elf-bfd.h: Add Meta. * elf32-metag.c: New file. * elf32-metag.h: New file. * libbfd.h: Regenerate. * reloc.c: Add Meta relocations. * targets.c: Add Meta. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * config/tc-metag.c: New file. * config/tc-metag.h: New file. * configure.tgt: Add Meta. * doc/Makefile.am: Add Meta. * doc/Makefile.in: Regenerate. * doc/all.texi: Add Meta. * doc/as.texiinfo: Document Meta options. * doc/c-metag.texi: New file. * gas/metag/labelarithmetic.d: New file. * gas/metag/labelarithmetic.s: New file. * gas/metag/metacore12.d: New file. * gas/metag/metacore12.s: New file. * gas/metag/metacore21-invalid.l: New file. * gas/metag/metacore21-invalid.s: New file. * gas/metag/metacore21.d: New file. * gas/metag/metacore21.s: New file. * gas/metag/metacore21ext.d: New file. * gas/metag/metacore21ext.s: New file. * gas/metag/metadsp21-invalid.l: New file. * gas/metag/metadsp21-invalid.s: New file. * gas/metag/metadsp21.d: New file. * gas/metag/metadsp21.s: New file. * gas/metag/metadsp21ext.d: New file. * gas/metag/metadsp21ext.s: New file. * gas/metag/metafpu21.d: New file. * gas/metag/metafpu21.s: New file. * gas/metag/metafpu21ext.d: New file. * gas/metag/metafpu21ext.s: New file. * gas/metag/metag.exp: New file. * gas/metag/tls.d: New file. * gas/metag/tls.s: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure.tgt: Add Meta. * emulparams/elf32metag.sh: New file. * emultempl/metagelf.em: New file. * ld-elf/merge.d: Mark Meta as xfail. * ld-gc/start.d: Skip this test on Meta. * ld-gc/personality.d: Skip this test on Meta. * ld-metag/external.s: New file. * ld-metag/metag.exp: New file. * ld-metag/pcrel.d: New file. * ld-metag/pcrel.s: New file. * ld-metag/shared.d: New file. * ld-metag/shared.r: New file. * ld-metag/shared.s: New file. * ld-metag/stub.d: New file. * ld-metag/stub.s: New file. * ld-metag/stub_pic_app.d: New file. * ld-metag/stub_pic_app.r: New file. * ld-metag/stub_pic_app.s: New file. * ld-metag/stub_pic_shared.d: New file. * ld-metag/stub_pic_shared.s: New file. * ld-metag/stub_shared.d: New file. * ld-metag/stub_shared.r: New file. * ld-metag/stub_shared.s: New file. * binutils/readelf.c: (guess_is_rela): Add EM_METAG. (dump_relocations): Add EM_METAG. (get_machine_name): Correct case for Meta. (is_32bit_abs_reloc): Add support for Meta ADDR32 reloc. (is_none_reloc): Add support for Meta NONE reloc.
2013-01-07oops - typo correction.Nick Clifton1-1/+1
2013-01-07 (make_instruction): Rename to cr16_make_instruction.Nick Clifton2-4/+9
(match_opcode): Rename to cr16_match_opcode.
2013-01-04 * archures.c: Add support for MIPS r5900Nick Clifton3-138/+341
* bfd-in2.h: Add support for MIPS r5900 * config.bfd: Add support for Sony Playstation 2 * cpu-mips.c: Add support for MIPS r5900 * elfxx-mips.c: Add support for MIPS r5900 (extension of r4000) * config/tc-mips.c: Add support for MIPS r5900 Add M_LQ_AB and M_SQ_AB to support large values for instructions lq and sq. * config/tc-mips.c (can_swap_branch_p, get_append_method): Detect some conditional short loops to fix a bug on the r5900 by NOP in the branch delay slot. * config/tc-mips.c (M_MUL): Support 3 operands in multu on r5900. * config/tc-mips.c (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I. * config/tc-mips.c (s_mipsset): Force 32 bit floating point on r5900. * configure.in: Detect CPU type when target string contains r5900 (e.g. mips64r5900el-linux-gnu). * config/tc-mips.c (mips_ip): Check parameter range of instructions mfps and mtps on r5900. * elf/mips.h: Add MIPS machine variant number for r5900 which is compatible with old Playstation 2 software. * opcode/mips.h: Add support for r5900 instructions including lq and sq. * configure.tgt: Support ELF files for Sony Playstation 2 (for ps2dev and ps2sdk). * emulparams/elf32lr5900n32.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI n32. * emulparams/elf32lr5900.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI o32. * Makefile.am: Add linker scripts for Sony Playstation 2 ELF files. * opcodes/mips-dis.c: Add names for CP0 registers of r5900. * opcodes/mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for instructions sq and lq. * opcodes/mips-opc.c: Add support for MIPS r5900 CPU. Add support for 128 bit MMI (Multimedia Instructions). Add support for EE instructions (Emotion Engine). Disable unsupported floating point instructions (64 bit and undefined compare operations). Enable instructions of MIPS ISA IV which are supported by r5900. Disable 64 bit co processor instructions. Disable 64 bit multiplication and division instructions. Disable instructions for co-processor 2 and 3, because these are not supported (preparation for later VU0 support (Vector Unit)). Disable cvt.w.s because this behaves like trunc.w.s and the correct execution can't be ensured on r5900. Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This will confuse less developers and compilers.
2013-01-04opcodes/Yufeng Zhang3-8/+33
2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64-opc.c (aarch64_print_operand): Change to print AARCH64_OPND_IMM_MOV in hexadecimal in the instruction and in decimal in comment. * aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag from the opcode entries of OP_MOV_IMM_LOG, OP_MOV_IMM_WIDEN and OP_MOV_IMM_WIDE. gas/testsuite/ 2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com> * gas/aarch64/int-insns.d: Update. * gas/aarch64/mov.d: Update. * gas/aarch64/reloc-insn.d: Update. ld/testsuite/ 2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com> * ld-aarch64/emit-relocs-264.d: Append the '-Mno-aliases' option to the objdump directive. * ld-aarch64/emit-relocs-266.d: Ditto. * ld-aarch64/emit-relocs-268.d: Ditto. * ld-aarch64/emit-relocs-269.d: Ditto. * ld-aarch64/emit-relocs-270.d: Ditto. * ld-aarch64/emit-relocs-271.d: Ditto. * ld-aarch64/emit-relocs-272.d: Ditto.
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