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| author | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-05-13 22:28:27 +0000 |
|---|---|---|
| committer | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-05-13 22:28:27 +0000 |
| commit | d2865ed314c9d0c2c9257ce833a6f3f5ebe20e7f (patch) | |
| tree | 8175437f3372369e0a0604150940c0a2eac2d346 /opcodes | |
| parent | 55fb6d274dd86d886b71b6a7cd5a017c1bd49bb9 (diff) | |
| download | gdb-d2865ed314c9d0c2c9257ce833a6f3f5ebe20e7f.zip gdb-d2865ed314c9d0c2c9257ce833a6f3f5ebe20e7f.tar.gz gdb-d2865ed314c9d0c2c9257ce833a6f3f5ebe20e7f.tar.bz2 | |
gas/
* testsuite/gas/aarch64/diagnostic.s: Update.
* testsuite/gas/aarch64/diagnostic.l: Ditto.
* testsuite/gas/aarch64/movi.s: Add new tests.
* testsuite/gas/aarch64/movi.d: Update.
opcodes/
* aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Remove assertion.
* aarch64-opc.c (operand_general_constraint_met_p): Relax the range
check from [0, 255] to [-128, 255].
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 6 | ||||
| -rw-r--r-- | opcodes/aarch64-asm.c | 1 | ||||
| -rw-r--r-- | opcodes/aarch64-opc.c | 6 |
3 files changed, 9 insertions, 4 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 9a80d04..d37be84 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2013-05-13 Yufeng Zhang <yufeng.zhang@arm.com> + + * aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Remove assertion. + * aarch64-opc.c (operand_general_constraint_met_p): Relax the range + check from [0, 255] to [-128, 255]. + 2013-05-09 Andrew Pinski <apinski@cavium.com> * mips-dis.c (mips_arch_choices): Add INSN_VIRT to mips32r2. diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index 7a92b49..96396e8 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -370,7 +370,6 @@ aarch64_ins_advsimd_imm_modified (const aarch64_operand *self ATTRIBUTE_UNUSED, imm = aarch64_shrink_expanded_imm8 (imm); assert ((int)imm >= 0); } - assert (imm <= 255); insert_fields (code, imm, 0, 2, FLD_defgh, FLD_abc); if (kind == AARCH64_MOD_NONE) diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index b7b1b4a..74f2826 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -1724,10 +1724,10 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx, assert (idx == 1); if (aarch64_get_qualifier_esize (opnds[0].qualifier) != 8) { - /* uimm8 */ - if (!value_in_range_p (opnd->imm.value, 0, 255)) + /* uimm8 or simm8 */ + if (!value_in_range_p (opnd->imm.value, -128, 255)) { - set_imm_out_of_range_error (mismatch_detail, idx, 0, 255); + set_imm_out_of_range_error (mismatch_detail, idx, -128, 255); return 0; } } |