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2024-01-22Updated Serbian translations for th bfd, gold and opcodes directoriesNick Clifton1-312/+371
2024-01-22opcodes: tic4x_disassemble swap xcalloc argumentsMark Wielaard1-2/+2
2024-01-19x86-64: Dwarf2 register numbers for %bnd<N>Jan Beulich2-8/+8
2024-01-19x86/APX: VROUND{P,S}{S,D} can generally be encodedJan Beulich2-147/+203
2024-01-19x86/APX: be consistent with insn suffixesJan Beulich1-5/+5
2024-01-19x86: drop redundant EVex128 from PUSH2/POP2Jan Beulich1-4/+4
2024-01-19x86: support APX forms of U{RD,WR}MSRJan Beulich5-12/+55
2024-01-18Add note to translators not to translate z/ArchitectureNick Clifton1-0/+1
2024-01-18Updated translations for various sub-directoriesNick Clifton4-1512/+1762
2024-01-15Change version to 2.42.50 and regenerate filesNick Clifton3-117/+130
2024-01-15Add markers for 2.42 branchNick Clifton1-0/+4
2024-01-15aarch64: rcpc3: Regenerate aarch64-*-2.c filesVictor Do Nascimento3-2870/+2977
2024-01-15aarch64: rcpc3: Add FP load/store insnsVictor Do Nascimento1-0/+4
2024-01-15aarch64: rcpc3: Add integer load/store insnsVictor Do Nascimento1-0/+5
2024-01-15aarch64: rcpc3: Define RCPC3_INSN macroVictor Do Nascimento1-0/+2
2024-01-15aarch64: rcpc3: add support in general_constraint_met_pVictor Do Nascimento1-0/+40
2024-01-15aarch64: rcpc3: New RCPC3_ADDR operand typesVictor Do Nascimento2-1/+20
2024-01-15aarch64: rcpc3: Define address operand fields and inserter/extractorsVictor Do Nascimento6-1/+150
2024-01-15aarch64: rcpc3: Create implicit load/store size calc functionVictor Do Nascimento1-0/+22
2024-01-15aarch64: rcpc3: Add +rcpc3 architectural feature support flagVictor Do Nascimento1-0/+4
2024-01-15aarch64: Fix tlbi and tlbip instructionsAndrew Carlotti2-141/+93
2024-01-15aarch64: Refactor aarch64_sys_ins_reg_supported_pAndrew Carlotti1-377/+204
2024-01-15Add generated source files and fix thinko in aarch64-asm.cNick Clifton4-564/+1056
2024-01-15aarch64: Add SVE2.1 Contiguous load/store instructions.Srinath Parvathaneni4-2/+59
2024-01-15PATCH 5/6][Binutils] aarch64: Add SVE2.1 fmin and fmax instructions.Srinath Parvathaneni1-0/+12
2024-01-15aarch64: Add SVE2.1 dupq, eorqv and extq instructions.Srinath Parvathaneni6-0/+73
2024-01-15aarch64: Add support for FEAT_SVE2p1.Srinath Parvathaneni3-0/+53
2024-01-15aarch64: Add support for FEAT_SME2p1 instructions.Srinath Parvathaneni7-0/+274
2024-01-15aarch64: Add support for FEAT_B16B16 instructions.Srinath Parvathaneni1-0/+31
2024-01-15opcodes: i386-reg.tbl: Add a comment to reflect dependency on orderingIndu Bhagat1-0/+3
2024-01-15opcodes: x86: new marker for insns that implicitly update stack pointerIndu Bhagat3-104/+107
2024-01-15opcodes: gas: x86: define and use Rex2 as attribute not constraintIndu Bhagat4-3890/+7777
2024-01-12aarch64: Remove unused codeAndrew Carlotti1-34/+0
2024-01-12aarch64: Make FEAT_ASMv8p2 instruction aliases always availableAndrew Carlotti1-2/+2
2024-01-12aarch64: Add +xs flag for existing instructionsAndrew Carlotti2-2/+7
2024-01-12aarch64: Add +wfxt flag for existing instructionsAndrew Carlotti1-2/+7
2024-01-12aarch64: Add +rcpc2 flag for existing instructionsAndrew Carlotti1-13/+18
2024-01-12aarch64: Add +jscvt flag for existing fjcvtzs instructionAndrew Carlotti1-1/+6
2024-01-11LoongArch: Discard extra spaces in objdump outputLulu Cai1-1/+6
2024-01-10gas: aarch64: Add system registers for Debug and PMU extensionsSaurabh Jha1-0/+41
2024-01-09x86: add missing APX logic to cpu_flags_match()Jan Beulich1-1/+7
2024-01-09aarch64: ADD FEAT_THE RCWCAS instructions.Srinath Parvathaneni2-139/+961
2024-01-09aarch64: Regenerate aarch64-*-2.c filesVictor Do Nascimento3-2407/+2454
2024-01-09aarch64: Add support for 128-bit system register mrrs and msrr insnsVictor Do Nascimento3-1/+12
2024-01-09aarch64: Add xs variants of tlbip operandsVictor Do Nascimento2-0/+125
2024-01-09aarch64: Implement TLBIP 128-bit instructionVictor Do Nascimento1-0/+3
2024-01-09aarch64: Create QL_SRC_X2 and QL_DEST_X2 qualifier macrosVictor Do Nascimento1-0/+12
2024-01-09aarch64: Apply narrowing of allowed immediate values for SYSPVictor Do Nascimento1-1/+1
2024-01-09aarch64: Add support for the SYSP 128-bit system instructionVictor Do Nascimento3-3/+11
2024-01-09aarch64: Add support for xzr register in register pair operandsVictor Do Nascimento3-4/+24
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