aarch64: rcpc3: Create implicit load/store size calc function

The allowed immediate offsets in integer rcpc3 load store instructions
are not encoded explicitly in the instruction itself, being rather
implicitly equivalent to the amount of data loaded/stored by the
instruction.

This leads to the requirement that this quantity be calculated based on
the number of registers involved in the transfer, either as data
source or destination registers and their respective qualifiers.

This is done via `calc_ldst_datasize (const aarch64_opnd_info *opnds)'
implemented here, using a cumulative sum of qualifier sizes preceding
the address operand in the OPNDS operand list argument.

1 files changed, 22 insertions, 0 deletions

diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 1196844..091df2c 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -1668,6 +1668,28 @@ check_za_access (const aarch64_opnd_info *opnd,
   return true;
 }
 
+/* Given a load/store operation, calculate the size of transferred data via a
+   cumulative sum of qualifier sizes preceding the address operand in the
+   OPNDS operand list argument.  */
+int
+calc_ldst_datasize (const aarch64_opnd_info *opnds)
+{
+  unsigned num_bytes = 0; /* total number of bytes transferred.  */
+  enum aarch64_operand_class opnd_class;
+  enum aarch64_opnd type;
+
+  for (int i = 0; i < AARCH64_MAX_OPND_NUM; i++)
+    {
+      type = opnds[i].type;
+      opnd_class = aarch64_operands[type].op_class;
+      if (opnd_class == AARCH64_OPND_CLASS_ADDRESS)
+	break;
+      num_bytes += aarch64_get_qualifier_esize (opnds[i].qualifier);
+    }
+  return num_bytes;
+}
+
+
 /* General constraint checking based on operand code.
 
    Return 1 if OPNDS[IDX] meets the general constraint of operand code TYPE