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path: root/opcodes/i386-dis.c
AgeCommit message (Expand)AuthorFilesLines
2023-07-11x86: fold legacy/VEX {,V}MOV{H,L}* entriesJan Beulich1-66/+32
2023-07-11x86: fold certain legacy/VEX table entriesJan Beulich1-293/+97
2023-07-04x86: flag bad EVEX masking for miscellaneous insnsJan Beulich1-21/+28
2023-07-04x86: flag EVEX masking when destination is GPR(-like)Jan Beulich1-1/+16
2023-07-04x86: flag EVEX.z set when destination is memoryJan Beulich1-0/+7
2023-07-04x86: flag EVEX.z set when destination is a mask registerJan Beulich1-0/+12
2023-07-04x86: re-work EVEX-z-without-masking checkJan Beulich1-10/+8
2023-06-21x86: fix expansion of %XVJan Beulich1-7/+8
2023-05-26x86: fix disassembler build after 1a3b4f90bc5fJan Beulich1-1/+1
2023-05-26x86: convert two pointers to (indexing) integersJan Beulich1-16/+17
2023-05-26x86: disassembling over-long insnsJan Beulich1-9/+10
2023-05-26x86: use fixed-width type for codep and friendsJan Beulich1-57/+55
2023-05-23Support Intel FRED LKGSZhang, Jun1-2/+41
2023-05-23Revert "Support Intel FRED LKGS"liuhongt1-41/+2
2023-05-23Support Intel FRED LKGSZhang, Jun1-2/+41
2023-05-12x86: move a few more disassembler helper functionsJan Beulich1-34/+29
2023-05-12x86: move get<N>() disassembler helper functionsJan Beulich1-75/+71
2023-04-28x86: limit data passed to i386_dis_printf()Jan Beulich1-22/+21
2023-04-28x86: limit data passed to prefix_name()Jan Beulich1-8/+13
2023-04-28x86: rework AMX control insn disassemblyJan Beulich1-107/+50
2023-04-28x86: rework AMX multiplication insn disassemblyJan Beulich1-110/+42
2023-04-26i386-dis.c UB shift and other tidiesAlan Modra1-94/+76
2023-04-24Revert "x86: work around compiler diagnosing dangling pointer"Alan Modra1-6/+0
2023-04-24gcc-13 i386-dis.c warningAlan Modra1-16/+31
2023-04-24x86: work around compiler diagnosing dangling pointerJan Beulich1-0/+6
2023-04-21Fix -Wmaybe-uninitialized warning in opcodes/i386-dis.cTom Tromey1-1/+2
2023-04-21x86: drop (explicit) BFD64 dependency from disassemblerJan Beulich1-13/+4
2023-04-21x86: drop use of setjmp() from disassemblerJan Beulich1-5/+0
2023-04-21x86: change fetch error handling for get<N>()Jan Beulich1-133/+114
2023-04-21x86: change fetch error handling when processing operandsJan Beulich1-233/+276
2023-04-21x86: change fetch error handling in get_valid_dis386()Jan Beulich1-30/+26
2023-04-21x86: change fetch error handling in ckprefix()Jan Beulich1-12/+20
2023-04-21x86: change fetch error handling in top-level functionJan Beulich1-13/+59
2023-04-21x86: move fetch error handling into a helper functionJan Beulich1-28/+35
2023-04-07Support Intel AMX-COMPLEXHaochen Jiang1-1/+33
2023-03-20Revert "segfault at i386-dis.c:9815"Alan Modra1-9/+4
2023-03-19segfault at i386-dis.c:9815Alan Modra1-4/+9
2023-01-20x86: embed register and alike names in disassemblerJan Beulich1-34/+34
2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2022-12-12x86: revert disassembler parts of "x86: Allow 16-bit register source for LAR ...Jan Beulich1-2/+14
2022-12-06x86: Remove unnecessary vex.w check for xh_mode in disassemblerHaochen Jiang1-17/+12
2022-12-03x86: Allow 16-bit register source for LAR and LSLH.J. Lu1-14/+2
2022-11-24x86: correct handling of LAR and LSLJan Beulich1-2/+14
2022-11-15Add AMD znver4 processor supportTejas Joshi1-1/+15
2022-11-08x86: Correct wrong comments in vex_w_tableHaochen Jiang1-1/+1
2022-11-08Support Intel RAO-INTKong Lingling1-1/+10
2022-11-04Support Intel AVX-NE-CONVERTkonglin11-3/+43
2022-11-02Support Intel MSRLISTHu, Lin11-0/+17
2022-11-02Support Intel WRMSRNSHu, Lin11-0/+7
2022-11-02Support Intel CMPccXADDHaochen Jiang1-17/+130
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