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path: root/opcodes/aarch64-asm-2.c
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2024-07-12aarch64: Add support for sme2.1 movaz instructions.Srinath Parvathaneni1-46/+48
2024-07-08aarch64: Add support for sve2p1 pmov instruction.srinath1-16/+24
2024-06-25aarch64: Fix sve2p1 ld[1-4]/st[1-4]q instruction operands.Srinath Parvathaneni1-73/+71
2024-06-25aarch64: Fix sve2p1 extq instruction operands.Srinath Parvathaneni1-8/+8
2024-06-25aarch64: Fix sve2p1 dupq instruction operands.Srinath Parvathaneni1-1/+0
2024-06-24aarch64: Add SME FP8 multiplication instructionsAndrew Carlotti1-35/+40
2024-06-24aarch64: Add FP8 Neon and SVE multiplication instructionsAndrew Carlotti1-126/+128
2024-06-24gas, aarch64: Add SME2 lutv2 extensionsaurabh.jha@arm.com1-40/+43
2024-06-12aarch64: add Branch Record Buffer extension instructionsClaudio Bantaloukas1-180/+183
2024-05-28gas, aarch64: Add SVE2 lut extensionsaurabh.jha@arm.com1-58/+61
2024-05-28gas, aarch64: Add AdvSIMD lut extensionsaurabh.jha@arm.com1-176/+181
2024-03-19gas, aarch64: Add faminmax extensionSaurabh Jha1-169/+169
2024-03-18Regenerate AArch64 opcodes filesNick Clifton1-114/+116
2024-01-15aarch64: rcpc3: Regenerate aarch64-*-2.c filesVictor Do Nascimento1-167/+174
2024-01-15Add generated source files and fix thinko in aarch64-asm.cNick Clifton1-60/+76
2024-01-09aarch64: Regenerate aarch64-*-2.c filesVictor Do Nascimento1-246/+252
2024-01-04Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2023-12-19aarch64: Add FEAT_ITE supportAndrea Corallo1-0/+1
2023-12-19aarch64: Add FEAT_ECBHB supportAndrea Corallo1-0/+1
2023-12-19aarch64: Add FEAT_SPECRES2 supportAndrea Corallo1-88/+89
2023-11-07aarch64: Add LSE128 instructionsVictor Do Nascimento1-237/+239
2023-11-02aarch64: Add support for GCSB DSYNC instruction.Srinath Parvathaneni1-168/+170
2023-11-02aarch64: Add support for GCS extension.srinath1-248/+249
2023-03-30aarch64: Add the RPRFM instructionRichard Sandiford1-68/+69
2023-03-30aarch64: Add new SVE dot-product instructionsRichard Sandiford1-34/+35
2023-03-30aarch64: Add the SME2 shift instructionsRichard Sandiford1-10/+13
2023-03-30aarch64: Add the SME2 MLALL and MLSLL instructionsRichard Sandiford1-15/+20
2023-03-30aarch64: Add the SME2 MLAL and MLSL instructionsRichard Sandiford1-16/+20
2023-03-30aarch64: Add the SME2 FMLA and FMLS instructionsRichard Sandiford1-8/+10
2023-03-30aarch64: Add the SME2 ADD and SUB instructionsRichard Sandiford1-25/+26
2023-03-30aarch64: Add the SME2 ZT0 instructionsRichard Sandiford1-8/+17
2023-03-30aarch64: Add the SME2 predicate-related instructionsRichard Sandiford1-20/+31
2023-03-30aarch64: Add the SME2 multivector LD1 and ST1 instructionsRichard Sandiford1-20/+24
2023-03-30aarch64: Add the SME2 MOVA instructionsRichard Sandiford1-12/+22
2023-03-30aarch64: Add support for predicate-as-counter registersRichard Sandiford1-117/+122
2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2022-11-14aarch64: Add support for Common Short Sequence Compression extensionAndre Vieira1-0/+2
2022-10-05Arm64: support CLEARBHB aliasJan Beulich1-105/+106
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2021-12-02aarch64: Add support for +mopsRichard Sandiford1-0/+4
2021-11-17aarch64: [SME] SVE2 instructions added to support SMEPrzemyslaw Wirkus1-2/+4
2021-11-17aarch64: [SME] Add SME mode selection and state access instructionsPrzemyslaw Wirkus1-149/+151
2021-11-17aarch64: [SME] Add LD1x, ST1x, LDR and STR instructionsPrzemyslaw Wirkus1-36/+42
2021-11-17aarch64: [SME] Add ZERO instructionPrzemyslaw Wirkus1-1/+2
2021-11-17aarch64: [SME] Add MOV and MOVA instructionsPrzemyslaw Wirkus1-3/+6
2021-11-17aarch64: [SME] Add SME instructionsPrzemyslaw Wirkus1-2/+5
2021-03-31Use bool in opcodesAlan Modra1-1/+1
2021-01-11aarch64: Remove support for CSREKyrylo Tkachov1-124/+124
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-11-09aarch64: Limit Rt register number for LS64 load/store instructionsPrzemyslaw Wirkus1-80/+81
generated by cgit v1.1 at 2024-09-12 01:55:47 +0000