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author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:13 +0100 |
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committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:13 +0100 |
commit | ed429b33c1ee8d6d8f8e640e58f04ec800bc7b2a (patch) | |
tree | 9dec9ddf10c70e8d8c16f5f0820eb23eefe4a733 /opcodes/aarch64-asm-2.c | |
parent | 80752eb0989b85e88af7f1f4627dbed8a42dfe6d (diff) | |
download | gdb-ed429b33c1ee8d6d8f8e640e58f04ec800bc7b2a.zip gdb-ed429b33c1ee8d6d8f8e640e58f04ec800bc7b2a.tar.gz gdb-ed429b33c1ee8d6d8f8e640e58f04ec800bc7b2a.tar.bz2 |
aarch64: Add the SME2 MLAL and MLSL instructions
The {BF,F,S,U}MLAL and {BF,F,S,U}MLSL instructions share the same
encoding. They are the first instance of a ZA (as opposed to ZA tile)
operand having a range of offsets. As with ZA tiles, the expected
range size is encoded in the operand-specific data field.
Diffstat (limited to 'opcodes/aarch64-asm-2.c')
-rw-r--r-- | opcodes/aarch64-asm-2.c | 36 |
1 files changed, 20 insertions, 16 deletions
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c index b4ce19d..badf3dc 100644 --- a/opcodes/aarch64-asm-2.c +++ b/opcodes/aarch64-asm-2.c @@ -685,7 +685,7 @@ aarch64_insert_operand (const aarch64_operand *self, case 33: case 34: case 35: - case 259: + case 263: return aarch64_ins_reglane (self, info, code, inst, errors); case 36: return aarch64_ins_reglist (self, info, code, inst, errors); @@ -731,12 +731,12 @@ aarch64_insert_operand (const aarch64_operand *self, case 193: case 194: case 237: - case 253: - case 254: - case 256: + case 257: case 258: - case 263: - case 264: + case 260: + case 262: + case 267: + case 268: return aarch64_ins_imm (self, info, code, inst, errors); case 44: case 45: @@ -805,8 +805,8 @@ aarch64_insert_operand (const aarch64_operand *self, case 107: return aarch64_ins_prfop (self, info, code, inst, errors); case 108: - case 255: - case 257: + case 259: + case 261: return aarch64_ins_none (self, info, code, inst, errors); case 109: return aarch64_ins_hint (self, info, code, inst, errors); @@ -919,28 +919,32 @@ aarch64_insert_operand (const aarch64_operand *self, return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors); case 235: case 236: - case 245: - case 246: case 247: case 248: case 249: case 250: case 251: case 252: + case 253: + case 254: + case 255: + case 256: return aarch64_ins_simple_index (self, info, code, inst, errors); case 239: case 240: case 241: - return aarch64_ins_sme_za_array (self, info, code, inst, errors); case 242: - return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors); case 243: - return aarch64_ins_sme_sm_za (self, info, code, inst, errors); + return aarch64_ins_sme_za_array (self, info, code, inst, errors); case 244: + return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors); + case 245: + return aarch64_ins_sme_sm_za (self, info, code, inst, errors); + case 246: return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors); - case 260: - case 261: - case 262: + case 264: + case 265: + case 266: return aarch64_ins_x0_to_x30 (self, info, code, inst, errors); default: assert (0); abort (); } |