aboutsummaryrefslogtreecommitdiff
path: root/include
AgeCommit message (Expand)AuthorFilesLines
2018-04-16Remove netware supportAlan Modra9-1300/+11
2018-04-16Remove tahoe supportAlan Modra2-232/+4
2018-04-11Remove i860, i960, bout and aout-adobe targetsAlan Modra12-1973/+16
2018-04-09PowerPC inline PLT call supportAlan Modra3-0/+13
2018-03-28[1/2][GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8/16/32/64_TPREL_LO12 supp...Renlin Li2-0/+21
2018-03-28Enhance the AARCH64 assembler to support LDFF1xx instructions which use REG+R...Nick Clifton2-0/+7
2018-03-21DT_FLAGS_1: Add Solaris bitsH.J. Lu2-0/+9
2018-03-14RISC-V: Add .insn support.Jim Wilson2-0/+35
2018-03-13Prevent memory access violations when attempting to parse an x86_64 PE binary...Nick Clifton2-0/+7
2018-03-08x86: Remove support for old (<= 2.8.1) versions of gccH.J. Lu2-6/+4
2018-02-27[ARM] Remove ARM_FEATURE_COPY macroThomas Preud'homme2-9/+4
2018-02-22New plugin interface to get list of symbols wrapped with --wrap option.Sriraman Tallam1-1/+11
2018-02-20MIPS16/opcodes: Free up `M' operand codeMaciej W. Rozycki2-3/+6
2018-02-12Add support for reading msdos MZ executables.Zebediah Figura4-31/+65
2018-01-13Add note about 2.30 branch creation to changelogsNick Clifton1-0/+4
2018-01-11ld: Add "-z separate-code" option to ELF linkerH.J. Lu2-0/+8
2018-01-04RISC-V: Add 2 missing privileged registers.Jim Wilson2-4/+15
2018-01-03Update year range in copyright notice of binutils filesAlan Modra306-305/+309
2018-01-03ChangeLog rotationAlan Modra2-859/+873
2018-01-02Update copyright year range in all GDB filesJoel Brobecker22-22/+22
2017-12-28RISC-V: Add missing privileged spec registers.Jim Wilson2-148/+214
2017-12-19Correct disassembly of dot product instructions.Tamar Christina2-0/+10
2017-12-19Add support for V_4B so we can properly reject it.Tamar Christina2-0/+6
2017-12-11Add plugin API for processing plugin-added input filesStephen Crane2-1/+26
2017-12-01Use consistent types for holding instructions, instruction masks, etc.Peter Bergner2-7/+25
2017-11-24Re-apply "elf: Properly compute offsets of note descriptor and next note"H.J. Lu2-0/+23
2017-11-24Revert "elf: Properly compute offsets of note descriptor and next note"Simon Marchi2-23/+0
2017-11-24elf: Properly compute offsets of note descriptor and next noteH.J. Lu2-0/+23
2017-11-16Add new AArch64 FP16 FM{A|S} instructions.Tamar Christina2-1/+8
2017-11-15Separate the new FP16 instructions backported from Armv8.4-a to Armv8.2-a int...Tamar Christina2-1/+7
2017-11-13PE: don't corrupt section flags when linking from ELF objectsJan Beulich2-1/+10
2017-11-09Enable the Dot Product extension by default for Armv8.4-a.Tamar Christina2-1/+6
2017-11-09Adds the new Fields and Operand types for the new instructions in Armv8.4-a.Tamar Christina2-0/+16
2017-11-09Split the ARM Crypto ISA extensions for AES and SHA1+2 into their own options...Tamar Christina2-0/+11
2017-11-09Change the type of the aarch64_feature_set typedef to unsigned long long so t...Nick Clifton2-1/+6
2017-11-08Split the AArch64 Crypto instructions for AES and SHA1+2 into their own optio...Nick Clifton2-0/+7
2017-11-08Adds command line support for Armv8.4-A, via the new command line option -mar...Jiong Wang2-2/+14
2017-11-07RISC-V: Add satp as an alias for sptbrPalmer Dabbelt2-2/+11
2017-11-07This patch similarly to the AArch64 one enables Dot Product support by defaul...Tamar Christina2-19/+33
2017-11-02aarch64: Remove AARCH64_FEATURE_F16 from AARCH64_ARCH_V8_2Siddhesh Poyarekar2-1/+5
2017-11-01FT32B is a new FT32 family member. It has a code compression scheme, which re...James Bowman2-0/+8
2017-10-25PR22348, conflicting global vars in crx and cr16Alan Modra3-14/+13
2017-10-24RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2Andrew Waterman2-1/+6
2017-10-12FT32: support for FT32B processor - part 1James Bowman3-3/+394
2017-10-05Handle FreeBSD-specific AT_EHDRFLAGS and AT_HWCAP auxiliary vector types.John Baldwin2-0/+6
2017-09-22LVU: dump loclists with locviewsAlexandre Oliva3-0/+17
2017-09-15Sync libiberty/ & include/ with GCCPedro Alves12-81/+1737
2017-09-11nds32: Rename __BIT() to N32_BIT().Kuan-Lin Chen2-2/+6
2017-09-05Missing relocation R_PPC_VLE_ADDR20 and add VLE flag to details in readelfAlexander Fedotov-B556132-0/+6
2017-08-24[PowerPC VLE] Add SPE2 and EFS2 instructions supportAlexander Fedotov2-0/+24
generated by cgit v1.1 at 2024-11-26 05:21:44 +0000