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2019-06-25x86: correct / adjust debug printingJan Beulich2-9/+19
2019-06-25x86: document certain command line options as "dangerous"Jan Beulich2-0/+11
2019-06-25x86: don't open code is_any_vex_encoding()Jan Beulich2-3/+5
2019-06-25x86: fix (dis)assembly of certain SSE2 insns in 16-bit modeJan Beulich4-0/+181
2019-06-25x86-64: also optimize ANDQ with immediate fitting in 7 bitsJan Beulich4-1/+25
2019-06-25x86: add CVT{,T}PS2PI cases to xmmwords testJan Beulich3-0/+12
2019-06-25Fix logical expression in last commitAlan Modra2-1/+5
2019-06-25PowerPC nopsAlan Modra6-19/+106
2019-06-19i386: Check vector length for EVEX broadcast instructionsH.J. Lu5-4/+20
2019-06-17i386: Check vector length for vshufXXX/vinsertXXX/vextractXXXH.J. Lu5-2/+19
2019-06-14Regenerate with approved autotools versionAlan Modra4-22/+14
2019-06-12Add missing ChangeLog entriesPeter Bergner1-0/+5
2019-06-12Remove the ldmx mnemonic that never made it into POWER9.Peter Bergner2-4/+0
2019-06-06gas: Add .enqcmd and noenqcmd directivesH.J. Lu3-0/+10
2019-06-06gas: Correct ChangeLog for commit 5d79adc4b22b0abdH.J. Lu1-12/+14
2019-06-05i386: Check vector length for EVEX vextractfXX and vinsertfXXH.J. Lu5-2/+21
2019-06-04i386: Check for reserved VEX.vvvv and EVEX.vvvvH.J. Lu5-0/+22
2019-06-04Enable Intel AVX512_VP2INTERSECT insnH.J. Lu18-1/+425
2019-06-04Add support for Intel ENQCMD[S] instructionsH.J. Lu13-1/+183
2019-05-30RISC-V: Fix lui argument parsing.Jim Wilson4-5/+16
2019-05-28x86: Add CheckRegSize to AVX512_BF16 instructions with Disp8ShiftVLH.J. Lu5-0/+27
2019-05-27Fix failure on powerpc 32-bit only targetsAlan Modra3-51/+140
2019-05-24aarch64: override default elf .set handling in gasSzabolcs Nagy5-0/+78
2019-05-24aarch64: handle .variant_pcs directive in gasSzabolcs Nagy7-0/+69
2019-05-24Regen POTFILES for bpfAlan Modra2-0/+6
2019-05-24PowerPC relocations for prefix insnsAlan Modra6-23/+218
2019-05-24PowerPC D-form prefixed loads and storesPeter Bergner6-11/+380
2019-05-24PowerPC add initial -mfuture instruction supportPeter Bergner6-40/+248
2019-05-23gas: add support for eBPFJose E. Marchesi41-9/+1606
2019-05-22S12Z: GAS: New option --mdollar-hex.John Darrington6-8/+103
2019-05-21[binutils, ARM] <spec_reg> changes for VMRS and VMSR instructionsSudakshina Das12-17/+193
2019-05-21[binutils, Arm] Add support for conditional instructions in Armv8.1-M MainlineSudakshina Das7-1/+162
2019-05-21[binutils, Arm] Add support for shift instructions in MVESudakshina Das7-0/+142
2019-05-21MIPS/gas: Reject $0 as source register for DAUI instructionFaraz Shahbazker4-1/+14
2019-05-21[GAS, Arm] PR24559: Fix pseudo load-operations for Armv8-M BaselineAndre Vieira6-0/+53
2019-05-21[binutils][Arm] Fix Branch Future relocation handling and testismsAndre Vieira9-15/+51
2019-05-21GAS: Replace macro LITERAL_PREFIXDOLLAR_HEX with a runtime value.John Darrington9-13/+39
2019-05-21Revert "GAS: Replace macro LITERAL_PREFIXDOLLAR_HEX with a runtime value."John Darrington8-21/+9
2019-05-20[MIPS] PR gas/14798: Limit IRIX5 specific default typing to IRIX targetsFaraz Shahbazker6-0/+35
2019-05-20GAS: Replace macro LITERAL_PREFIXDOLLAR_HEX with a runtime value.John Darrington8-9/+21
2019-05-18S12Z (doc): Minor improvements to text and formatting.John Darrington1-53/+47
2019-05-17GAS (documentation): Remove trademark acknowledgements.John Darrington3-2/+7
2019-05-16[PATCH, GAS, Arm] Refactor check_simd_pred_availabilityAndre Vieira2-50/+96
2019-05-16[PATCH, binutils, Arm] Add Armv8.1-M Mainline and MVE enablement to NEWSAndre Vieira2-0/+7
2019-05-16[PATCH 57/57][Arm][GAS] MVE TestsAndre Vieira161-0/+399210
2019-05-16[PATCH 44/57][Arm][OBJDUMP] Add support for MVE instructions: vcvt and vrintAndre Vieira1-1/+1
2019-05-16[PATCH 36/57][Arm][GAS] Add support for MVE instructions: wlstp, dlstp, letp ...Andre Vieira5-34/+152
2019-05-16[PATCH 35/57][Arm][GAS] Add support for MVE instructions: vshlc and vshllAndre Vieira8-0/+195
2019-05-16[PATCH 34/57][Arm][GAS] Add support for MVE instructions: vshl and vqshlAndre Vieira8-43/+364
2019-05-16[PATCH 33/57][Arm][GAS] Add support for MVE instructions: vshr, vrshr, vsli, ...Andre Vieira14-16/+343
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