aboutsummaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
Diffstat (limited to 'include')
-rw-r--r--include/ChangeLog5
-rw-r--r--include/opcode/mips.h3
2 files changed, 6 insertions, 2 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index 19dc8e3..b97775e 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,8 @@
+2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
+
+ * opcode/mips.h: Complement change made to opcodes and remove
+ references to the `g' regular MIPS ISA operand code.
+
2021-05-28 H.J. Lu <hongjiu.lu@intel.com>
PR ld/27905
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index f72c5db..9fa9fcb 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -899,7 +899,6 @@ mips_opcode_32bit_p (const struct mips_opcode *mo)
"$" 1 bit load high flag (OP_*_MT_H)
"*" 2 bit dsp/smartmips accumulator register (OP_*_MTACC_T)
"&" 2 bit dsp/smartmips accumulator register (OP_*_MTACC_D)
- "g" 5 bit coprocessor 1 and 2 destination register (OP_*_RD)
"+t" 5 bit coprocessor 0 destination register (OP_*_RT)
MCU ASE usage:
@@ -1001,7 +1000,7 @@ mips_opcode_32bit_p (const struct mips_opcode *mo)
"1234567890"
"%[]<>(),+-:'@!#$*&\~"
"ABCDEFGHIJKLMNOPQRSTUVWXYZ"
- "abcdefghijklopqrstuvwxz"
+ "abcdef hijkl opqrstuvwx z"
Extension character sequences used so far ("+" followed by the
following), for quick reference when adding more: