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authorDmitry Selyutin <ghostmansd@gmail.com>2022-05-24 13:46:35 +0000
committerAlan Modra <amodra@gmail.com>2022-05-25 12:13:44 +0930
commitdd4832bf3efc1bd1797a6b9188260692b8b0db52 (patch)
tree385e50c4a1bcd67d1f55570319e5eb496b2bd2bb /opcodes
parent8e5eb8e1b0cb2a408008a3e40e571f193917dcc8 (diff)
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opcodes: introduce BC field; fix isel
Per Power ISA Version 3.1B 3.3.12, isel uses BC field rather than CRB field present in binutils sources. Also, per 1.6.2, BC has the same semantics as BA and BB fields, so this should keep the same flags and mask, only with the different offset. opcodes/ * ppc-opc.c (BC): Define new field, with the same definition as CRB field, but with the PPC_OPERAND_CR_BIT flag present. gas/ * testsuite/gas/ppc/476.d: Update. * testsuite/gas/ppc/a2.d: Update. * testsuite/gas/ppc/e500.d: Update. * testsuite/gas/ppc/power7.d: Update.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ppc-opc.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index bd83d44..f5bd6da 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -2770,9 +2770,12 @@ const struct powerpc_operand powerpc_operands[] =
#define RAB VAB + 1
{ 0x1f, 16, insert_bab, extract_bab, PPC_OPERAND_GPR },
+#define BC RAB + 1
+ { 0x1f, 6, NULL, NULL, PPC_OPERAND_CR_BIT },
+
/* The BD field in a B form instruction. The lower two bits are
forced to zero. */
-#define BD RAB + 1
+#define BD BC + 1
{ 0xfffc, 0, NULL, NULL, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },
/* The BD field in a B form instruction when absolute addressing is
@@ -6895,7 +6898,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"isellt", XISEL(31,15,0), X_MASK, PPCISEL, EXT, {RT, RA0, RB}},
{"iselgt", XISEL(31,15,1), X_MASK, PPCISEL, EXT, {RT, RA0, RB}},
{"iseleq", XISEL(31,15,2), X_MASK, PPCISEL, EXT, {RT, RA0, RB}},
-{"isel", XISEL(31,15,0), XISEL_MASK, PPCISEL|TITAN, 0, {RT, RA0, RB, CRB}},
+{"isel", XISEL(31,15,0), XISEL_MASK, PPCISEL|TITAN, 0, {RT, RA0, RB, BC}},
{"tlbilxlpid", XTO(31,18,0), XTO_MASK, E500MC|PPCA2, 0, {0}},
{"tlbilxpid", XTO(31,18,1), XTO_MASK, E500MC|PPCA2, 0, {0}},