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| author | Jan Beulich <jbeulich@suse.com> | 2022-12-12 14:01:02 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2022-12-12 14:01:02 +0100 |
| commit | a28fedbc3f582ce7c8bad2eb017b1dc072bb1da7 (patch) | |
| tree | a43cd6d934a4396e597ee88d3db98fb190ae34b9 /opcodes/i386-opc.tbl | |
| parent | 77a19f0e19391dd243f8090a613324c8836e1f8a (diff) | |
| download | gdb-a28fedbc3f582ce7c8bad2eb017b1dc072bb1da7.zip gdb-a28fedbc3f582ce7c8bad2eb017b1dc072bb1da7.tar.gz gdb-a28fedbc3f582ce7c8bad2eb017b1dc072bb1da7.tar.bz2 | |
x86: further re-work insn/suffix recognition to also cover MOVSX
PR gas/29524
Having templates with a suffix explicitly present has always been
quirky. After prior adjustment all that's left to also eliminate the
anomaly from move-with-sign-extend is to consolidate the insn templates
and to make may_need_pass2() cope (plus extend testsuite coverage).
Diffstat (limited to 'opcodes/i386-opc.tbl')
| -rw-r--r-- | opcodes/i386-opc.tbl | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 9eba0a3..20ae7e8 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -172,14 +172,9 @@ mov, 0xf24, None, Cpu386|CpuNo64, D|RegMem|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No movbe, 0x0f38f0, None, CpuMovbe, D|Modrm|CheckRegSize|No_bSuf|No_sSuf, { Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } // Move with sign extend. -// "movsbl" & "movsbw" must not be unified into "movsb" to avoid -// conflict with the "movs" string move instruction. -movsbl, 0xfbe, None, Cpu386, Modrm|NoSuf, { Reg8|Byte|Unspecified|BaseIndex, Reg32 } -movsbw, 0xfbe, None, Cpu386, Modrm|NoSuf, { Reg8|Byte|Unspecified|BaseIndex, Reg16 } -movswl, 0xfbf, None, Cpu386, Modrm|NoSuf, { Reg16|Word|Unspecified|BaseIndex, Reg32 } -movsbq, 0xfbe, None, Cpu64, Modrm|NoSuf|Size64, { Reg8|Byte|Unspecified|BaseIndex, Reg64 } -movswq, 0xfbf, None, Cpu64, Modrm|NoSuf|Size64, { Reg16|Word|Unspecified|BaseIndex, Reg64 } -movslq, 0x63, None, Cpu64, Modrm|NoSuf|Size64, { Reg32|Dword|Unspecified|BaseIndex, Reg64 } +movsb, 0xfbe, None, Cpu386, Modrm|No_bSuf|No_sSuf, { Reg8|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } +movsw, 0xfbf, None, Cpu386, Modrm|No_bSuf|No_wSuf|No_sSuf, { Reg16|Unspecified|BaseIndex, Reg32|Reg64 } +movsl, 0x63, None, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg32|Unspecified|BaseIndex, Reg64 } movsx, 0xfbe, None, Cpu386, W|Modrm|No_lSuf|No_sSuf|No_qSuf, { Reg8|Reg16|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } movsx, 0x63, None, Cpu64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Reg32|Unspecified|BaseIndex, Reg32|Reg64 } movsxd, 0x63, None, Cpu64, Modrm|NoSuf, { Reg32|Unspecified|BaseIndex, Reg32|Reg64 } |